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tools/x86/kcpuid: Fix avx512bw and avx512lvl fields in Fn00000007 

[ Upstream commit 4e347bdf44 ]

Leaf Fn00000007 contains avx512bw at bit 26 and avx512vl at bit 28. This
is incorrect per the SDM. Correct avx512bw to be bit 30 and avx512lvl to
be bit 31.

Fixes: c6b2f240bf ("tools/x86: Add a kcpuid tool to show raw CPU features")
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Feng Tang <feng.tang@intel.com>
Link: https://lore.kernel.org/r/20230206141832.4162264-2-terry.bowman@amd.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Terry Bowman 2023-02-06 08:18:30 -06:00 committed by Greg Kroah-Hartman
parent 78e32896ec
commit f5222fbd79
1 changed files with 2 additions and 2 deletions
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4
tools/arch/x86/kcpuid/cpuid.csv
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@ -184,8 +184,8 @@
7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr 7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr
7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr 7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr
7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr 7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr
7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr 7, 0, EBX, 30, avx512bw, AVX512 Byte & Word instr
7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL) 7, 0, EBX, 31, avx512vl, AVX512 Vector Length Extentions (VL)
7, 0, ECX, 0, prefetchwt1, X 7, 0, ECX, 0, prefetchwt1, X
7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions 7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions
7, 0, ECX, 2, umip, User-mode Instruction Prevention 7, 0, ECX, 2, umip, User-mode Instruction Prevention

Can't render this file because it has a wrong number of fields in line 110.