spi: spi-zynqmp-gqspi: Fix incorrect indentation
Fixed incorrect indentation in ZynqMP qspi controller driver. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2b246b6f0925c8a2a767a4240e8738ffeefd62be.1600931476.git.michal.simek@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -386,7 +386,6 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high)
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if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) &&
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if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) &&
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(statusreg & GQSPI_ISR_TXEMPTY_MASK))
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(statusreg & GQSPI_ISR_TXEMPTY_MASK))
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break;
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break;
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else
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cpu_relax();
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cpu_relax();
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} while (!time_after_eq(jiffies, timeout));
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} while (!time_after_eq(jiffies, timeout));
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@ -549,7 +548,7 @@ static void zynqmp_qspi_readrxfifo(struct zynqmp_qspi *xqspi, u32 size)
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while ((count < size) && (xqspi->bytes_to_receive > 0)) {
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while ((count < size) && (xqspi->bytes_to_receive > 0)) {
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if (xqspi->bytes_to_receive >= 4) {
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if (xqspi->bytes_to_receive >= 4) {
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(*(u32 *) xqspi->rxbuf) =
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(*(u32 *)xqspi->rxbuf) =
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zynqmp_gqspi_read(xqspi, GQSPI_RXD_OFST);
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zynqmp_gqspi_read(xqspi, GQSPI_RXD_OFST);
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xqspi->rxbuf += 4;
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xqspi->rxbuf += 4;
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xqspi->bytes_to_receive -= 4;
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xqspi->bytes_to_receive -= 4;
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@ -670,7 +669,8 @@ static void zynqmp_process_dma_irq(struct zynqmp_qspi *xqspi)
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/* Manual start */
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/* Manual start */
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zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
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zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
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(zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) |
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(zynqmp_gqspi_read(xqspi,
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GQSPI_CONFIG_OFST) |
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GQSPI_CFG_START_GEN_FIFO_MASK));
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GQSPI_CFG_START_GEN_FIFO_MASK));
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/* Enable the RX interrupts for IO mode */
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/* Enable the RX interrupts for IO mode */
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@ -725,8 +725,8 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_id)
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ret = IRQ_HANDLED;
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ret = IRQ_HANDLED;
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}
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}
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if ((xqspi->bytes_to_receive == 0) && (xqspi->bytes_to_transfer == 0)
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if (xqspi->bytes_to_receive == 0 && xqspi->bytes_to_transfer == 0 &&
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&& ((status & GQSPI_IRQ_MASK) == GQSPI_IRQ_MASK)) {
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((status & GQSPI_IRQ_MASK) == GQSPI_IRQ_MASK)) {
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zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
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zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
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complete(&xqspi->data_completion);
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complete(&xqspi->data_completion);
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ret = IRQ_HANDLED;
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ret = IRQ_HANDLED;
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@ -744,7 +744,7 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi)
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dma_addr_t addr;
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dma_addr_t addr;
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u64 dma_align = (u64)(uintptr_t)xqspi->rxbuf;
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u64 dma_align = (u64)(uintptr_t)xqspi->rxbuf;
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if ((xqspi->bytes_to_receive < 8) ||
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if (xqspi->bytes_to_receive < 8 ||
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((dma_align & GQSPI_DMA_UNALIGN) != 0x0)) {
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((dma_align & GQSPI_DMA_UNALIGN) != 0x0)) {
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/* Setting to IO mode */
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/* Setting to IO mode */
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config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
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config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
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