spi: spi-zynqmp-gqspi: Fix incorrect indentation

Fixed incorrect indentation in ZynqMP qspi controller driver.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2b246b6f0925c8a2a767a4240e8738ffeefd62be.1600931476.git.michal.simek@xilinx.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Amit Kumar Mahapatra 2020-09-24 09:11:19 +02:00 committed by Mark Brown
parent 1c26372e5a
commit f09a433b1e
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GPG Key ID: 24D68B725D5487D0
1 changed files with 23 additions and 23 deletions

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@ -386,7 +386,6 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high)
if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) && if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) &&
(statusreg & GQSPI_ISR_TXEMPTY_MASK)) (statusreg & GQSPI_ISR_TXEMPTY_MASK))
break; break;
else
cpu_relax(); cpu_relax();
} while (!time_after_eq(jiffies, timeout)); } while (!time_after_eq(jiffies, timeout));
@ -549,7 +548,7 @@ static void zynqmp_qspi_readrxfifo(struct zynqmp_qspi *xqspi, u32 size)
while ((count < size) && (xqspi->bytes_to_receive > 0)) { while ((count < size) && (xqspi->bytes_to_receive > 0)) {
if (xqspi->bytes_to_receive >= 4) { if (xqspi->bytes_to_receive >= 4) {
(*(u32 *) xqspi->rxbuf) = (*(u32 *)xqspi->rxbuf) =
zynqmp_gqspi_read(xqspi, GQSPI_RXD_OFST); zynqmp_gqspi_read(xqspi, GQSPI_RXD_OFST);
xqspi->rxbuf += 4; xqspi->rxbuf += 4;
xqspi->bytes_to_receive -= 4; xqspi->bytes_to_receive -= 4;
@ -670,7 +669,8 @@ static void zynqmp_process_dma_irq(struct zynqmp_qspi *xqspi)
/* Manual start */ /* Manual start */
zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
(zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) | (zynqmp_gqspi_read(xqspi,
GQSPI_CONFIG_OFST) |
GQSPI_CFG_START_GEN_FIFO_MASK)); GQSPI_CFG_START_GEN_FIFO_MASK));
/* Enable the RX interrupts for IO mode */ /* Enable the RX interrupts for IO mode */
@ -725,8 +725,8 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_id)
ret = IRQ_HANDLED; ret = IRQ_HANDLED;
} }
if ((xqspi->bytes_to_receive == 0) && (xqspi->bytes_to_transfer == 0) if (xqspi->bytes_to_receive == 0 && xqspi->bytes_to_transfer == 0 &&
&& ((status & GQSPI_IRQ_MASK) == GQSPI_IRQ_MASK)) { ((status & GQSPI_IRQ_MASK) == GQSPI_IRQ_MASK)) {
zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK); zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
complete(&xqspi->data_completion); complete(&xqspi->data_completion);
ret = IRQ_HANDLED; ret = IRQ_HANDLED;
@ -744,7 +744,7 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi)
dma_addr_t addr; dma_addr_t addr;
u64 dma_align = (u64)(uintptr_t)xqspi->rxbuf; u64 dma_align = (u64)(uintptr_t)xqspi->rxbuf;
if ((xqspi->bytes_to_receive < 8) || if (xqspi->bytes_to_receive < 8 ||
((dma_align & GQSPI_DMA_UNALIGN) != 0x0)) { ((dma_align & GQSPI_DMA_UNALIGN) != 0x0)) {
/* Setting to IO mode */ /* Setting to IO mode */
config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);