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ASoC: wm8904: Fill the cache for WM8904_ADC_TEST_0 register 

The WM8904_ADC_TEST_0 register is modified as part of updating the OSR
controls but does not have a cache default, leading to errors when we try
to modify these controls in cache only mode with no prior read:

wm8904 3-001a: ASoC: error at snd_soc_component_update_bits on wm8904.3-001a for register: [0x000000c6] -16

Add a read of the register to probe() to fill the cache and avoid both the
error messages and the misconfiguration of the chip which will result.

Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230723-asoc-fix-wm8904-adc-test-read-v1-1-2cdf2edd83fd@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mark Brown 2023-07-23 00:27:22 +01:00
parent c918008fe7
commit f061e2be86
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1 changed files with 3 additions and 0 deletions
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3
sound/soc/codecs/wm8904.c
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@ -2308,6 +2308,9 @@ static int wm8904_i2c_probe(struct i2c_client *i2c)
regmap_update_bits(wm8904->regmap, WM8904_BIAS_CONTROL_0,
WM8904_POBCTRL, 0);
/* Fill the cache for the ADC test register */
regmap_read(wm8904->regmap, WM8904_ADC_TEST_0, &val);
/* Can leave the device powered off until we need it */
regcache_cache_only(wm8904->regmap, true);
regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies);