KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD
To signify that the macros only support 8-bit xAPIC destination ID. Suggested-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220519102709.24125-3-suravee.suthikulpanit@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -46,7 +46,7 @@ static void hv_apic_icr_write(u32 low, u32 id)
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{
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{
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u64 reg_val;
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u64 reg_val;
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reg_val = SET_APIC_DEST_FIELD(id);
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reg_val = SET_XAPIC_DEST_FIELD(id);
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reg_val = reg_val << 32;
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reg_val = reg_val << 32;
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reg_val |= low;
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reg_val |= low;
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@ -89,8 +89,8 @@
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#define APIC_DM_EXTINT 0x00700
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#define APIC_DM_EXTINT 0x00700
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#define APIC_VECTOR_MASK 0x000FF
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#define APIC_VECTOR_MASK 0x000FF
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#define APIC_ICR2 0x310
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#define APIC_ICR2 0x310
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#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
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#define GET_XAPIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
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#define SET_APIC_DEST_FIELD(x) ((x) << 24)
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#define SET_XAPIC_DEST_FIELD(x) ((x) << 24)
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#define APIC_LVTT 0x320
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#define APIC_LVTT 0x320
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#define APIC_LVTTHMR 0x330
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#define APIC_LVTTHMR 0x330
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#define APIC_LVTPC 0x340
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#define APIC_LVTPC 0x340
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@ -275,7 +275,7 @@ void native_apic_icr_write(u32 low, u32 id)
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unsigned long flags;
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unsigned long flags;
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local_irq_save(flags);
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local_irq_save(flags);
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
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apic_write(APIC_ICR2, SET_XAPIC_DEST_FIELD(id));
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apic_write(APIC_ICR, low);
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apic_write(APIC_ICR, low);
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local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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@ -99,7 +99,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
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static inline int __prepare_ICR2(unsigned int mask)
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static inline int __prepare_ICR2(unsigned int mask)
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{
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{
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return SET_APIC_DEST_FIELD(mask);
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return SET_XAPIC_DEST_FIELD(mask);
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}
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}
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static inline void __xapic_wait_icr_idle(void)
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static inline void __xapic_wait_icr_idle(void)
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@ -1326,7 +1326,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
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if (apic_x2apic_mode(apic))
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if (apic_x2apic_mode(apic))
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irq.dest_id = icr_high;
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irq.dest_id = icr_high;
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else
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else
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irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
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irq.dest_id = GET_XAPIC_DEST_FIELD(icr_high);
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trace_kvm_apic_ipi(icr_low, irq.dest_id);
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trace_kvm_apic_ipi(icr_low, irq.dest_id);
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@ -303,7 +303,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm, struct kvm_lapic *source
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if (apic_x2apic_mode(source))
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if (apic_x2apic_mode(source))
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dest = icrh;
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dest = icrh;
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else
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else
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dest = GET_APIC_DEST_FIELD(icrh);
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dest = GET_XAPIC_DEST_FIELD(icrh);
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if (dest_mode == APIC_DEST_PHYSICAL) {
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if (dest_mode == APIC_DEST_PHYSICAL) {
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/* broadcast destination, use slow path */
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/* broadcast destination, use slow path */
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@ -397,7 +397,7 @@ static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,
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*/
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*/
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kvm_for_each_vcpu(i, vcpu, kvm) {
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
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if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
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GET_APIC_DEST_FIELD(icrh),
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GET_XAPIC_DEST_FIELD(icrh),
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icrl & APIC_DEST_MASK)) {
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icrl & APIC_DEST_MASK)) {
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vcpu->arch.apic->irr_pending = true;
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vcpu->arch.apic->irr_pending = true;
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svm_complete_interrupt_delivery(vcpu,
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svm_complete_interrupt_delivery(vcpu,
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