x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n
If a kernel is built with CONFIG_RETPOLINE=n, but the user still wants to mitigate Spectre v2 using IBRS or eIBRS, the RSB filling will be silently disabled. There's nothing retpoline-specific about RSB buffer filling. Remove the CONFIG_RETPOLINE guards around it. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -698,7 +698,6 @@ SYM_CODE_START(__switch_to_asm)
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movl %ebx, PER_CPU_VAR(__stack_chk_guard)
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#endif
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#ifdef CONFIG_RETPOLINE
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/*
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* When switching from a shallower to a deeper call stack
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* the RSB may either underflow or use entries populated
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@ -707,7 +706,6 @@ SYM_CODE_START(__switch_to_asm)
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* speculative execution to prevent attack.
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*/
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FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
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#endif
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/* Restore flags or the incoming task to restore AC state. */
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popfl
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@ -255,7 +255,6 @@ SYM_FUNC_START(__switch_to_asm)
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movq %rbx, PER_CPU_VAR(fixed_percpu_data) + stack_canary_offset
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#endif
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#ifdef CONFIG_RETPOLINE
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/*
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* When switching from a shallower to a deeper call stack
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* the RSB may either underflow or use entries populated
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@ -264,7 +263,6 @@ SYM_FUNC_START(__switch_to_asm)
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* speculative execution to prevent attack.
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*/
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FILL_RETURN_BUFFER %r12, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
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#endif
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/* restore callee-saved registers */
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popq %r15
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@ -122,11 +122,9 @@
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* monstrosity above, manually.
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*/
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.macro FILL_RETURN_BUFFER reg:req nr:req ftr:req
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#ifdef CONFIG_RETPOLINE
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ALTERNATIVE "jmp .Lskip_rsb_\@", "", \ftr
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__FILL_RETURN_BUFFER(\reg,\nr,%_ASM_SP)
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.Lskip_rsb_\@:
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#endif
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.endm
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/*
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