dt-bindings: i2c: Convert i2c-mux bindings to DT schema
As some of the example I2C devices don't have schemas yet, change them to ones that do. Cc: Peter Rosin <peda@axentia.se> Acked-by: Wolfram Sang <wsa@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210526184839.2937899-5-robh@kernel.org
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@ -27,7 +27,7 @@ Required properties:
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- i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C
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parents.
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Furthermore, I2C mux properties and child nodes. See i2c-mux.txt in this
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Furthermore, I2C mux properties and child nodes. See i2c-mux.yaml in this
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directory.
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Example:
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@ -22,8 +22,8 @@ Required properties:
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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- mux-gpios: list of gpios used to control the muxer
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.yaml in this directory.
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* I2C child bus nodes. See i2c-mux.yaml in this directory.
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Optional properties:
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- idle-state: value to set the muxer to when idle. When no value is
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@ -1,99 +0,0 @@
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General Purpose I2C Bus Mux
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This binding describes an I2C bus multiplexer that uses a mux controller
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from the mux subsystem to route the I2C signals.
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.-----. .-----.
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| dev | | dev |
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.------------. '-----' '-----'
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| SoC | | |
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| | .--------+--------'
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| .------. | .------+ child bus A, on MUX value set to 0
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| | I2C |-|--| Mux |
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| '------' | '--+---+ child bus B, on MUX value set to 1
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| .------. | | '----------+--------+--------.
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| | MUX- | | | | | |
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| | Ctrl |-|-----+ .-----. .-----. .-----.
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| '------' | | dev | | dev | | dev |
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'------------' '-----' '-----' '-----'
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Required properties:
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- compatible: i2c-mux
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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- mux-controls: The phandle of the mux controller to use for operating the
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mux.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory. The sub-bus number
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is also the mux-controller state described in ../mux/mux-controller.yaml
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Optional properties:
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- mux-locked: If present, explicitly allow unrelated I2C transactions on the
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parent I2C adapter at these times:
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+ during setup of the multiplexer
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+ between setup of the multiplexer and the child bus I2C transaction
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+ between the child bus I2C transaction and releasing of the multiplexer
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+ during releasing of the multiplexer
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However, I2C transactions to devices behind all I2C multiplexers connected
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to the same parent adapter that this multiplexer is connected to are blocked
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for the full duration of the complete multiplexed I2C transaction (i.e.
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including the times covered by the above list).
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If mux-locked is not present, the multiplexer is assumed to be parent-locked.
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This means that no unrelated I2C transactions are allowed on the parent I2C
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adapter for the complete multiplexed I2C transaction.
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The properties of mux-locked and parent-locked multiplexers are discussed
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in more detail in Documentation/i2c/i2c-topology.rst.
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For each i2c child node, an I2C child bus will be created. They will
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be numbered based on their order in the device tree.
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Whenever an access is made to a device on a child bus, the value set
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in the relevant node's reg property will be set as the state in the
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mux controller.
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Example:
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mux: mux-controller {
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compatible = "gpio-mux";
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#mux-control-cells = <0>;
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mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
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<&pioA 1 GPIO_ACTIVE_HIGH>;
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};
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i2c-mux {
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compatible = "i2c-mux";
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mux-locked;
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i2c-parent = <&i2c1>;
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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ssd1307: oled@3c {
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compatible = "solomon,ssd1307fb-i2c";
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reg = <0x3c>;
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pwms = <&pwm 4 3000>;
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reset-gpios = <&gpio2 7 1>;
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reset-active-low;
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};
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};
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i2c@3 {
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reg = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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pca9555: pca9555@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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};
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@ -0,0 +1,124 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: General Purpose I2C Bus Mux
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maintainers:
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- Peter Rosin <peda@axentia.se>
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description: |+
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This binding describes an I2C bus multiplexer that uses a mux controller
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from the mux subsystem to route the I2C signals.
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.-----. .-----.
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| dev | | dev |
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.------------. '-----' '-----'
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| SoC | | |
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| | .--------+--------'
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| .------. | .------+ child bus A, on MUX value set to 0
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| | I2C |-|--| Mux |
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| '------' | '--+---+ child bus B, on MUX value set to 1
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| .------. | | '----------+--------+--------.
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| | MUX- | | | | | |
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| | Ctrl |-|-----+ .-----. .-----. .-----.
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| '------' | | dev | | dev | | dev |
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'------------' '-----' '-----' '-----'
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allOf:
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- $ref: /schemas/i2c/i2c-mux.yaml#
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properties:
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compatible:
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const: i2c-mux
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i2c-parent:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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The phandle of the I2C bus that this multiplexer's master-side port is
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connected to.
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mux-controls:
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maxItems: 1
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description:
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The mux-controller states are the I2C sub-bus numbers.
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mux-locked:
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type: boolean
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description: |
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Explicitly allow unrelated I2C transactions on the parent I2C adapter at
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these times:
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- during setup of the multiplexer
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- between setup of the multiplexer and the child bus I2C transaction
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- between the child bus I2C transaction and releasing of the multiplexer
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- during releasing of the multiplexer
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However, I2C transactions to devices behind all I2C multiplexers connected
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to the same parent adapter that this multiplexer is connected to are blocked
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for the full duration of the complete multiplexed I2C transaction (i.e.
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including the times covered by the above list).
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If mux-locked is not present, the multiplexer is assumed to be parent-locked.
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This means that no unrelated I2C transactions are allowed on the parent I2C
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adapter for the complete multiplexed I2C transaction.
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The properties of mux-locked and parent-locked multiplexers are discussed
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in more detail in Documentation/i2c/i2c-topology.rst.
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required:
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- compatible
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- i2c-parent
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- mux-controls
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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mux: mux-controller {
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compatible = "gpio-mux";
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#mux-control-cells = <0>;
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mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
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<&pioA 1 GPIO_ACTIVE_HIGH>;
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};
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i2c-mux {
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compatible = "i2c-mux";
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mux-locked;
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i2c-parent = <&i2c1>;
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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i2c@3 {
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reg = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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};
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...
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@ -8,8 +8,8 @@ Required Properties:
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The following required properties are defined externally:
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- Standard I2C mux properties. See i2c-mux.txt in this directory.
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- I2C child bus nodes. See i2c-mux.txt in this directory.
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- Standard I2C mux properties. See i2c-mux.yaml in this directory.
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- I2C child bus nodes. See i2c-mux.yaml in this directory.
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Optional Properties:
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@ -28,9 +28,9 @@ Also required are:
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* Standard pinctrl properties that specify the pin mux state for each child
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bus. See ../pinctrl/pinctrl-bindings.txt.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.yaml in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.yaml in this directory.
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For each named state defined in the pinctrl-names property, an I2C child bus
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will be created. I2C child bus numbers are assigned based on the index into
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@ -7,8 +7,8 @@ Required properties:
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- compatible: i2c-mux-reg
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.yaml in this directory.
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* I2C child bus nodes. See i2c-mux.yaml in this directory.
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Optional properties:
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- reg: this pair of <offset size> specifies the register to control the mux.
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@ -1,73 +0,0 @@
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Common i2c bus multiplexer/switch properties.
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An i2c bus multiplexer/switch will have several child busses that are
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numbered uniquely in a device dependent manner. The nodes for an i2c bus
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multiplexer/switch will have one child node for each child bus.
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Optional properties:
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- #address-cells = <1>;
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This property is required if the i2c-mux child node does not exist.
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- #size-cells = <0>;
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This property is required if the i2c-mux child node does not exist.
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- i2c-mux
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For i2c multiplexers/switches that have child nodes that are a mixture
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of both i2c child busses and other child nodes, the 'i2c-mux' subnode
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can be used for populating the i2c child busses. If an 'i2c-mux'
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subnode is present, only subnodes of this will be considered as i2c
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child busses.
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Required properties for the i2c-mux child node:
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- #address-cells = <1>;
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- #size-cells = <0>;
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Required properties for i2c child bus nodes:
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- #address-cells = <1>;
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- #size-cells = <0>;
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- reg : The sub-bus number.
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Optional properties for i2c child bus nodes:
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- Other properties specific to the multiplexer/switch hardware.
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- Child nodes conforming to i2c bus binding
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Example :
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/*
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An NXP pca9548 8 channel I2C multiplexer at address 0x70
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with two NXP pca8574 GPIO expanders attached, one each to
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ports 3 and 4.
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*/
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mux@70 {
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compatible = "nxp,pca9548";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio1: gpio@38 {
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compatible = "nxp,pca8574";
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reg = <0x38>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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gpio2: gpio@38 {
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compatible = "nxp,pca8574";
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reg = <0x38>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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};
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@ -0,0 +1,87 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Common i2c bus multiplexer/switch properties.
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maintainers:
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- Peter Rosin <peda@axentia.se>
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description: |+
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An i2c bus multiplexer/switch will have several child busses that are numbered
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uniquely in a device dependent manner. The nodes for an i2c bus
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multiplexer/switch will have one child node for each child bus.
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For i2c multiplexers/switches that have child nodes that are a mixture of both
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i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
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populating the i2c child busses. If an 'i2c-mux' subnode is present, only
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subnodes of this will be considered as i2c child busses.
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properties:
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$nodename:
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pattern: '^(i2c-?)?mux'
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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patternProperties:
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'^i2c@[0-9a-f]+$':
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$ref: /schemas/i2c/i2c-controller.yaml
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unevaluatedProperties: false
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properties:
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reg:
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description: The mux selector sub-bus number for the child I2C bus.
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maxItems: 1
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additionalProperties: true
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examples:
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- |
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/*
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* An NXP pca9548 8 channel I2C multiplexer at address 0x70
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* with two NXP pca8574 GPIO expanders attached, one each to
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* ports 3 and 4.
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*/
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux@70 {
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compatible = "nxp,pca9548";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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gpio@20 {
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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};
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};
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};
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};
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...
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