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i2c: hisi: Only use the completion interrupt to finish the transfer 

[ Upstream commit d982635126 ]

The controller will always generate a completion interrupt when the
transfer is finished normally or not. Currently we use either error or
completion interrupt to finish, this may result the completion
interrupt unhandled and corrupt the next transfer, especially at low
speed mode. Since on error case, the error interrupt will come first
then is the completion interrupt. So only use the completion interrupt
to finish the whole transfer process.

Fixes: d62fbdb99a ("i2c: add support for HiSilicon I2C controller")
Reported-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Sheng Feng <fengsheng5@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Yicong Yang 2023-03-13 15:45:52 +08:00 committed by Greg Kroah-Hartman
parent d6ea83a476
commit a0de3f29d8
1 changed files with 5 additions and 1 deletions
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6
drivers/i2c/busses/i2c-hisi.c
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@ -339,7 +339,11 @@ static irqreturn_t hisi_i2c_irq(int irq, void *context)
hisi_i2c_read_rx_fifo(ctlr);
out:
if (int_stat & HISI_I2C_INT_TRANS_CPLT || ctlr->xfer_err) {
/*
* Only use TRANS_CPLT to indicate the completion. On error cases we'll
* get two interrupts, INT_ERR first then TRANS_CPLT.
*/
if (int_stat & HISI_I2C_INT_TRANS_CPLT) {
hisi_i2c_disable_int(ctlr, HISI_I2C_INT_ALL);
hisi_i2c_clear_int(ctlr, HISI_I2C_INT_ALL);
complete(ctlr->completion);