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LoongArch: Fix perf event id calculation 

LoongArch PMCFG has 10bit event id rather than 8 bit, so fix it.

Cc: stable@vger.kernel.org
Signed-off-by: Jun Yi <yijun@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
Huacai Chen 2023-06-15 14:35:52 +08:00
parent 346dc92962
commit 962369120d
1 changed files with 3 additions and 3 deletions
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6
arch/loongarch/kernel/perf_event.c
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@ -271,7 +271,7 @@ static void loongarch_pmu_enable_event(struct hw_perf_event *evt, int idx)
WARN_ON(idx < 0 || idx >= loongarch_pmu.num_counters); WARN_ON(idx < 0 || idx >= loongarch_pmu.num_counters);
/* Make sure interrupt enabled. */ /* Make sure interrupt enabled. */
cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base) |
(evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE; (evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE;
cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id(); cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();
@ -594,7 +594,7 @@ static struct pmu pmu = {
static unsigned int loongarch_pmu_perf_event_encode(const struct loongarch_perf_event *pev) static unsigned int loongarch_pmu_perf_event_encode(const struct loongarch_perf_event *pev)
{ {
return (pev->event_id & 0xff); return M_PERFCTL_EVENT(pev->event_id);
} }
static const struct loongarch_perf_event *loongarch_pmu_map_general_event(int idx) static const struct loongarch_perf_event *loongarch_pmu_map_general_event(int idx)
@ -849,7 +849,7 @@ static void resume_local_counters(void)
static const struct loongarch_perf_event *loongarch_pmu_map_raw_event(u64 config) static const struct loongarch_perf_event *loongarch_pmu_map_raw_event(u64 config)
{ {
raw_event.event_id = config & 0xff; raw_event.event_id = M_PERFCTL_EVENT(config);
return &raw_event; return &raw_event;
} }