dt-bindings: PCI: fsl,imx6q: fix assigned-clocks warning
assigned-clocks are a dependency of clocks, however the dtschema has
limitation and expects clocks to be present in the binding using
assigned-clocks, not in other referenced bindings. The clocks were
defined in common fsl,imx6q-pcie-common.yaml, which is referenced by
fsl,imx6q-pcie-ep.yaml. The fsl,imx6q-pcie-ep.yaml used assigned-clocks
thus leading to warnings:
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000:
Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
Fix this by moving clocks to each specific schema from the common one
and narrowing them to strictly match what is expected for given device.
Fixes: b10f82380e
("dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20230508071837.68552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
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@ -17,20 +17,11 @@ description:
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properties:
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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maxItems: 4
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clock-names:
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minItems: 3
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items:
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- const: pcie
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- const: pcie_bus
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- enum: [ pcie_phy, pcie_aux ]
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- enum: [ pcie_inbound_axi, pcie_aux ]
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maxItems: 4
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num-lanes:
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const: 1
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@ -31,6 +31,19 @@ properties:
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- const: dbi
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- const: addr_space
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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clock-names:
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minItems: 3
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maxItems: 4
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interrupts:
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items:
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- description: builtin eDMA interrupter.
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@ -49,6 +62,31 @@ required:
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allOf:
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- $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
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- $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mq-pcie-ep
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_aux
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else:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_aux
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unevaluatedProperties: false
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@ -40,6 +40,19 @@ properties:
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- const: dbi
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- const: config
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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clock-names:
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minItems: 3
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maxItems: 4
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interrupts:
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items:
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- description: builtin MSI controller.
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@ -77,6 +90,70 @@ required:
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allOf:
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- $ref: /schemas/pci/snps,dw-pcie.yaml#
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- $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx6sx-pcie
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_inbound_axi
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mq-pcie
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_aux
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx6q-pcie
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- fsl,imx6qp-pcie
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- fsl,imx7d-pcie
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mm-pcie
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- fsl,imx8mp-pcie
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_aux
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unevaluatedProperties: false
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