OrgACRN
/
acrn-kernel
mirror of https://github.com/projectacrn/acrn-kernel.git
1
0
Fork 0
Code Issues Releases Wiki Activity

ASoC: rt5682: Add a new property for the DMIC clock driving 

The patch adds a new property to set the DMIC clock driving.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20201113055400.11242-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Oder Chiou 2020-11-13 13:53:59 +08:00 committed by Mark Brown
parent a5a8ac3ca0
commit 7416f6bc5f
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
4 changed files with 23 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/sound/rt5682.h
View File

@ -40,6 +40,7 @@ struct rt5682_platform_data {
unsigned int btndet_delay;
unsigned int dmic_clk_rate;
unsigned int dmic_delay;
bool dmic_clk_driving_high;
const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
};

5
sound/soc/codecs/rt5682-i2c.c
View File

@ -221,6 +221,11 @@ static int rt5682_i2c_probe(struct i2c_client *i2c,
case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
if (rt5682->pdata.dmic_clk_driving_high)
regmap_update_bits(rt5682->regmap,
RT5682_PAD_DRIVING_CTRL,
RT5682_PAD_DRV_GP3_MASK,
2 << RT5682_PAD_DRV_GP3_SFT);
break;
default:

3
sound/soc/codecs/rt5682.c
View File

@ -2989,6 +2989,9 @@ int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev)
rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX],
rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]);
rt5682->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
"realtek,dmic-clk-driving-high");
return 0;
}
EXPORT_SYMBOL_GPL(rt5682_parse_dt);

14
sound/soc/codecs/rt5682.h
View File

@ -1271,6 +1271,20 @@
#define RT5682_CP_CLK_HP_300KHZ (0x2 << 4)
#define RT5682_CP_CLK_HP_600KHZ (0x3 << 4)
/* Pad Driving Control (0x0136) */
#define RT5682_PAD_DRV_GP1_MASK (0x3 << 14)
#define RT5682_PAD_DRV_GP1_SFT 14
#define RT5682_PAD_DRV_GP2_MASK (0x3 << 12)
#define RT5682_PAD_DRV_GP2_SFT 12
#define RT5682_PAD_DRV_GP3_MASK (0x3 << 10)
#define RT5682_PAD_DRV_GP3_SFT 10
#define RT5682_PAD_DRV_GP4_MASK (0x3 << 8)
#define RT5682_PAD_DRV_GP4_SFT 8
#define RT5682_PAD_DRV_GP5_MASK (0x3 << 6)
#define RT5682_PAD_DRV_GP5_SFT 6
#define RT5682_PAD_DRV_GP6_MASK (0x3 << 4)
#define RT5682_PAD_DRV_GP6_SFT 4
/* Chopper and Clock control for DAC (0x013a)*/
#define RT5682_CKXEN_DAC1_MASK (0x1 << 13)
#define RT5682_CKXEN_DAC1_SFT 13