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Input: mtk-pmic-keys - move long press debounce mask to mtk_pmic_regs 

As the second and last step of preparation to add support for more
PMICs in this driver, move the long press debounce mask to struct
mtk_pmic_regs and use that in mtk_pmic_keys_lp_reset_setup() instead
of directly using the definition.

While at it, remove the definition for MTK_PMIC_RST_DU_SHIFT as we
are able to calculate it dynamically and spares us some unnecessary
new definitions around for future per-PMIC variations of RST_DU_MASK.

Lastly, it was necessary to change the function signature of
mtk_pmic_keys_lp_reset_setup() to now pass a pointer to the main
mtk_pmic_regs structure, since that's where the reset debounce
mask now resides.

This commit brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220524093505.85438-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This commit is contained in:
AngeloGioacchino Del Regno 2022-05-31 14:26:34 -07:00 committed by Dmitry Torokhov
parent b581acb49a
commit 69cf890d8b
1 changed files with 9 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/input/keyboard/mtk-pmic-keys.c
View File

@ -19,7 +19,6 @@
#include <linux/regmap.h>
#define MTK_PMIC_RST_DU_MASK GENMASK(9, 8)
#define MTK_PMIC_RST_DU_SHIFT 8
#define MTK_PMIC_PWRKEY_RST BIT(6)
#define MTK_PMIC_HOMEKEY_RST BIT(5)
@ -48,6 +47,7 @@ struct mtk_pmic_keys_regs {
struct mtk_pmic_regs {
const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
u32 pmic_rst_reg;
u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
};
static const struct mtk_pmic_regs mt6397_regs = {
@ -58,6 +58,7 @@ static const struct mtk_pmic_regs mt6397_regs = {
MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST),
.pmic_rst_reg = MT6397_TOP_RST_MISC,
.rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
};
static const struct mtk_pmic_regs mt6323_regs = {
@ -68,6 +69,7 @@ static const struct mtk_pmic_regs mt6323_regs = {
MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST),
.pmic_rst_reg = MT6323_TOP_RST_MISC,
.rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
};
static const struct mtk_pmic_regs mt6358_regs = {
@ -80,6 +82,7 @@ static const struct mtk_pmic_regs mt6358_regs = {
0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
MTK_PMIC_HOMEKEY_RST),
.pmic_rst_reg = MT6358_TOP_RST_MISC,
.rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
};
struct mtk_pmic_keys_info {
@ -105,7 +108,7 @@ enum mtk_pmic_keys_lp_mode {
};
static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
u32 pmic_rst_reg)
const struct mtk_pmic_regs *regs)
{
const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr;
u32 long_press_mode, long_press_debounce;
@ -120,8 +123,8 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
if (error)
long_press_debounce = 0;
mask = MTK_PMIC_RST_DU_MASK;
value = long_press_debounce << MTK_PMIC_RST_DU_SHIFT;
mask = regs->rst_lprst_mask;
value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1);
error = of_property_read_u32(keys->dev->of_node,
"mediatek,long-press-mode",
@ -147,7 +150,7 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
break;
}
regmap_update_bits(keys->regmap, pmic_rst_reg, mask, value);
regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value);
}
static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
@ -351,7 +354,7 @@ static int mtk_pmic_keys_probe(struct platform_device *pdev)
return error;
}
mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg);
mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs);
platform_set_drvdata(pdev, keys);