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dmaengine: ti: k3-psil: add additional TX threads for j721e 

Add matching PSI-L threads mapping for transmission DMA channels
on the J721E platform.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20220919205931.8397-2-mranostay@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Matt Ranostay 2022-09-19 13:59:30 -07:00 committed by Vinod Koul
parent 5cfeaf7cc5
commit 693e9c269e
1 changed files with 79 additions and 0 deletions
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79
drivers/dma/ti/k3-psil-j721e.c
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@ -266,6 +266,69 @@ static struct psil_ep j721e_dst_ep_map[] = {
PSIL_ETHERNET(0xc205),
PSIL_ETHERNET(0xc206),
PSIL_ETHERNET(0xc207),
/* PDMA6 (PSIL_PDMA_MCASP_G0) - McASP0-2 */
PSIL_PDMA_MCASP(0xc400),
PSIL_PDMA_MCASP(0xc401),
PSIL_PDMA_MCASP(0xc402),
/* PDMA7 (PSIL_PDMA_MCASP_G1) - McASP3-11 */
PSIL_PDMA_MCASP(0xc500),
PSIL_PDMA_MCASP(0xc501),
PSIL_PDMA_MCASP(0xc502),
PSIL_PDMA_MCASP(0xc503),
PSIL_PDMA_MCASP(0xc504),
PSIL_PDMA_MCASP(0xc505),
PSIL_PDMA_MCASP(0xc506),
PSIL_PDMA_MCASP(0xc507),
PSIL_PDMA_MCASP(0xc508),
/* PDMA8 (PDMA_MISC_G0) - SPI0-1 */
PSIL_PDMA_XY_PKT(0xc600),
PSIL_PDMA_XY_PKT(0xc601),
PSIL_PDMA_XY_PKT(0xc602),
PSIL_PDMA_XY_PKT(0xc603),
PSIL_PDMA_XY_PKT(0xc604),
PSIL_PDMA_XY_PKT(0xc605),
PSIL_PDMA_XY_PKT(0xc606),
PSIL_PDMA_XY_PKT(0xc607),
/* PDMA9 (PDMA_MISC_G1) - SPI2-3 */
PSIL_PDMA_XY_PKT(0xc60c),
PSIL_PDMA_XY_PKT(0xc60d),
PSIL_PDMA_XY_PKT(0xc60e),
PSIL_PDMA_XY_PKT(0xc60f),
PSIL_PDMA_XY_PKT(0xc610),
PSIL_PDMA_XY_PKT(0xc611),
PSIL_PDMA_XY_PKT(0xc612),
PSIL_PDMA_XY_PKT(0xc613),
/* PDMA10 (PDMA_MISC_G2) - SPI4-5 */
PSIL_PDMA_XY_PKT(0xc618),
PSIL_PDMA_XY_PKT(0xc619),
PSIL_PDMA_XY_PKT(0xc61a),
PSIL_PDMA_XY_PKT(0xc61b),
PSIL_PDMA_XY_PKT(0xc61c),
PSIL_PDMA_XY_PKT(0xc61d),
PSIL_PDMA_XY_PKT(0xc61e),
PSIL_PDMA_XY_PKT(0xc61f),
/* PDMA11 (PDMA_MISC_G3) */
PSIL_PDMA_XY_PKT(0xc624),
PSIL_PDMA_XY_PKT(0xc625),
PSIL_PDMA_XY_PKT(0xc626),
PSIL_PDMA_XY_PKT(0xc627),
PSIL_PDMA_XY_PKT(0xc628),
PSIL_PDMA_XY_PKT(0xc629),
PSIL_PDMA_XY_PKT(0xc630),
PSIL_PDMA_XY_PKT(0xc63a),
/* PDMA13 (PDMA_USART_G0) - UART0-1 */
PSIL_PDMA_XY_PKT(0xc700),
PSIL_PDMA_XY_PKT(0xc701),
/* PDMA14 (PDMA_USART_G1) - UART2-3 */
PSIL_PDMA_XY_PKT(0xc702),
PSIL_PDMA_XY_PKT(0xc703),
/* PDMA15 (PDMA_USART_G2) - UART4-9 */
PSIL_PDMA_XY_PKT(0xc704),
PSIL_PDMA_XY_PKT(0xc705),
PSIL_PDMA_XY_PKT(0xc706),
PSIL_PDMA_XY_PKT(0xc707),
PSIL_PDMA_XY_PKT(0xc708),
PSIL_PDMA_XY_PKT(0xc709),
/* CPSW9 */
PSIL_ETHERNET(0xca00),
PSIL_ETHERNET(0xca01),
@ -284,6 +347,22 @@ static struct psil_ep j721e_dst_ep_map[] = {
PSIL_ETHERNET(0xf005),
PSIL_ETHERNET(0xf006),
PSIL_ETHERNET(0xf007),
/* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
PSIL_PDMA_XY_PKT(0xf100),
PSIL_PDMA_XY_PKT(0xf101),
PSIL_PDMA_XY_PKT(0xf102),
PSIL_PDMA_XY_PKT(0xf103),
/* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
PSIL_PDMA_XY_PKT(0xf200),
PSIL_PDMA_XY_PKT(0xf201),
PSIL_PDMA_XY_PKT(0xf202),
PSIL_PDMA_XY_PKT(0xf203),
PSIL_PDMA_XY_PKT(0xf204),
PSIL_PDMA_XY_PKT(0xf205),
PSIL_PDMA_XY_PKT(0xf206),
PSIL_PDMA_XY_PKT(0xf207),
/* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
PSIL_PDMA_XY_PKT(0xf300),
/* SA2UL */
PSIL_SA2UL(0xf500, 1),
PSIL_SA2UL(0xf501, 1),