dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings. Signed-off-by: Qin Jian <qinjian@cqplus1.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) Sunplus Co., Ltd. 2021
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/reset/sunplus,reset.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Sunplus SoC Reset Controller
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maintainers:
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- Qin Jian <qinjian@cqplus1.com>
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properties:
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compatible:
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const: sunplus,sp7021-reset
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reg:
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maxItems: 1
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"#reset-cells":
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const: 1
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required:
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- compatible
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- reg
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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rstc: reset@9c000054 {
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compatible = "sunplus,sp7021-reset";
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reg = <0x9c000054 0x28>;
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#reset-cells = <1>;
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};
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...
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@ -2831,6 +2831,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers)
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S: Maintained
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W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
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F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml
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F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml
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F: include/dt-bindings/reset/sunplus,sp7021-reset.h
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ARM/Synaptics SoC support
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M: Jisheng Zhang <jszhang@kernel.org>
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (C) Sunplus Technology Co., Ltd.
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* All rights reserved.
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*/
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#ifndef _DT_BINDINGS_RST_SUNPLUS_SP7021_H
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#define _DT_BINDINGS_RST_SUNPLUS_SP7021_H
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#define RST_SYSTEM 0
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#define RST_RTC 1
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#define RST_IOCTL 2
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#define RST_IOP 3
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#define RST_OTPRX 4
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#define RST_NOC 5
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#define RST_BR 6
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#define RST_RBUS_L00 7
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#define RST_SPIFL 8
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#define RST_SDCTRL0 9
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#define RST_PERI0 10
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#define RST_A926 11
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#define RST_UMCTL2 12
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#define RST_PERI1 13
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#define RST_DDR_PHY0 14
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#define RST_ACHIP 15
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#define RST_STC0 16
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#define RST_STC_AV0 17
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#define RST_STC_AV1 18
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#define RST_STC_AV2 19
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#define RST_UA0 20
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#define RST_UA1 21
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#define RST_UA2 22
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#define RST_UA3 23
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#define RST_UA4 24
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#define RST_HWUA 25
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#define RST_DDC0 26
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#define RST_UADMA 27
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#define RST_CBDMA0 28
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#define RST_CBDMA1 29
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#define RST_SPI_COMBO_0 30
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#define RST_SPI_COMBO_1 31
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#define RST_SPI_COMBO_2 32
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#define RST_SPI_COMBO_3 33
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#define RST_AUD 34
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#define RST_USBC0 35
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#define RST_USBC1 36
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#define RST_UPHY0 37
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#define RST_UPHY1 38
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#define RST_I2CM0 39
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#define RST_I2CM1 40
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#define RST_I2CM2 41
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#define RST_I2CM3 42
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#define RST_PMC 43
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#define RST_CARD_CTL0 44
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#define RST_CARD_CTL1 45
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#define RST_CARD_CTL4 46
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#define RST_BCH 47
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#define RST_DDFCH 48
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#define RST_CSIIW0 49
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#define RST_CSIIW1 50
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#define RST_MIPICSI0 51
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#define RST_MIPICSI1 52
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#define RST_HDMI_TX 53
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#define RST_VPOST 54
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#define RST_TGEN 55
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#define RST_DMIX 56
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#define RST_TCON 57
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#define RST_INTERRUPT 58
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#define RST_RGST 59
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#define RST_GPIO 60
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#define RST_RBUS_TOP 61
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#define RST_MAILBOX 62
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#define RST_SPIND 63
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#define RST_I2C2CBUS 64
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#define RST_SEC 65
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#define RST_DVE 66
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#define RST_GPOST0 67
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#define RST_OSD0 68
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#define RST_DISP_PWM 69
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#define RST_UADBG 70
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#define RST_DUMMY_MASTER 71
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#define RST_FIO_CTL 72
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#define RST_FPGA 73
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#define RST_L2SW 74
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#define RST_ICM 75
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#define RST_AXI_GLOBAL 76
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#endif
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