ACPI/IORT: Add support to retrieve IORT RMR reserved regions
Parse through the IORT RMR nodes and populate the reserve region list corresponding to a given IOMMU and device(optional). Also, go through the ID mappings of the RMR node and retrieve all the SIDs associated with it. Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Steven Price <steven.price@arm.com> Tested-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Tested-by: Hanjun Guo <guohanjun@huawei.com> Reviewed-by: Hanjun Guo <guohanjun@huawei.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220615101044.1972-5-shameerali.kolothum.thodi@huawei.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Shameer Kolothum
Joerg Roedel
parent
55be25b8b5
commit
491cf4a673
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@ -788,6 +788,294 @@ void acpi_configure_pmsi_domain(struct device *dev)
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}
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#ifdef CONFIG_IOMMU_API
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static void iort_rmr_free(struct device *dev,
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struct iommu_resv_region *region)
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{
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struct iommu_iort_rmr_data *rmr_data;
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rmr_data = container_of(region, struct iommu_iort_rmr_data, rr);
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kfree(rmr_data->sids);
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kfree(rmr_data);
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}
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static struct iommu_iort_rmr_data *iort_rmr_alloc(
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struct acpi_iort_rmr_desc *rmr_desc,
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int prot, enum iommu_resv_type type,
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u32 *sids, u32 num_sids)
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{
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struct iommu_iort_rmr_data *rmr_data;
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struct iommu_resv_region *region;
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u32 *sids_copy;
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u64 addr = rmr_desc->base_address, size = rmr_desc->length;
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rmr_data = kmalloc(sizeof(*rmr_data), GFP_KERNEL);
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if (!rmr_data)
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return NULL;
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/* Create a copy of SIDs array to associate with this rmr_data */
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sids_copy = kmemdup(sids, num_sids * sizeof(*sids), GFP_KERNEL);
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if (!sids_copy) {
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kfree(rmr_data);
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return NULL;
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}
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rmr_data->sids = sids_copy;
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rmr_data->num_sids = num_sids;
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if (!IS_ALIGNED(addr, SZ_64K) || !IS_ALIGNED(size, SZ_64K)) {
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/* PAGE align base addr and size */
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addr &= PAGE_MASK;
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size = PAGE_ALIGN(size + offset_in_page(rmr_desc->base_address));
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pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] not aligned to 64K, continue with [0x%llx - 0x%llx]\n",
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rmr_desc->base_address,
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rmr_desc->base_address + rmr_desc->length - 1,
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addr, addr + size - 1);
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}
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region = &rmr_data->rr;
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INIT_LIST_HEAD(®ion->list);
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region->start = addr;
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region->length = size;
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region->prot = prot;
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region->type = type;
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region->free = iort_rmr_free;
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return rmr_data;
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}
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static void iort_rmr_desc_check_overlap(struct acpi_iort_rmr_desc *desc,
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u32 count)
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{
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int i, j;
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for (i = 0; i < count; i++) {
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u64 end, start = desc[i].base_address, length = desc[i].length;
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if (!length) {
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pr_err(FW_BUG "RMR descriptor[0x%llx] with zero length, continue anyway\n",
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start);
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continue;
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}
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end = start + length - 1;
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/* Check for address overlap */
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for (j = i + 1; j < count; j++) {
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u64 e_start = desc[j].base_address;
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u64 e_end = e_start + desc[j].length - 1;
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if (start <= e_end && end >= e_start)
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pr_err(FW_BUG "RMR descriptor[0x%llx - 0x%llx] overlaps, continue anyway\n",
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start, end);
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}
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}
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}
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/*
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* Please note, we will keep the already allocated RMR reserve
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* regions in case of a memory allocation failure.
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*/
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static void iort_get_rmrs(struct acpi_iort_node *node,
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struct acpi_iort_node *smmu,
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u32 *sids, u32 num_sids,
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struct list_head *head)
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{
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struct acpi_iort_rmr *rmr = (struct acpi_iort_rmr *)node->node_data;
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struct acpi_iort_rmr_desc *rmr_desc;
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int i;
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rmr_desc = ACPI_ADD_PTR(struct acpi_iort_rmr_desc, node,
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rmr->rmr_offset);
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iort_rmr_desc_check_overlap(rmr_desc, rmr->rmr_count);
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for (i = 0; i < rmr->rmr_count; i++, rmr_desc++) {
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struct iommu_iort_rmr_data *rmr_data;
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enum iommu_resv_type type;
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int prot = IOMMU_READ | IOMMU_WRITE;
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if (rmr->flags & ACPI_IORT_RMR_REMAP_PERMITTED)
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type = IOMMU_RESV_DIRECT_RELAXABLE;
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else
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type = IOMMU_RESV_DIRECT;
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if (rmr->flags & ACPI_IORT_RMR_ACCESS_PRIVILEGE)
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prot |= IOMMU_PRIV;
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/* Attributes 0x00 - 0x03 represents device memory */
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if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) <=
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ACPI_IORT_RMR_ATTR_DEVICE_GRE)
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prot |= IOMMU_MMIO;
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else if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) ==
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ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB)
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prot |= IOMMU_CACHE;
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rmr_data = iort_rmr_alloc(rmr_desc, prot, type,
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sids, num_sids);
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if (!rmr_data)
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return;
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list_add_tail(&rmr_data->rr.list, head);
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}
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}
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static u32 *iort_rmr_alloc_sids(u32 *sids, u32 count, u32 id_start,
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u32 new_count)
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{
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u32 *new_sids;
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u32 total_count = count + new_count;
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int i;
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new_sids = krealloc_array(sids, count + new_count,
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sizeof(*new_sids), GFP_KERNEL);
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if (!new_sids)
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return NULL;
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for (i = count; i < total_count; i++)
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new_sids[i] = id_start++;
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return new_sids;
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}
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static bool iort_rmr_has_dev(struct device *dev, u32 id_start,
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u32 id_count)
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{
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int i;
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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/*
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* Make sure the kernel has preserved the boot firmware PCIe
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* configuration. This is required to ensure that the RMR PCIe
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* StreamIDs are still valid (Refer: ARM DEN 0049E.d Section 3.1.1.5).
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*/
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if (dev_is_pci(dev)) {
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struct pci_dev *pdev = to_pci_dev(dev);
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struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
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if (!host->preserve_config)
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return false;
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}
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for (i = 0; i < fwspec->num_ids; i++) {
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if (fwspec->ids[i] >= id_start &&
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fwspec->ids[i] <= id_start + id_count)
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return true;
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}
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return false;
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}
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static void iort_node_get_rmr_info(struct acpi_iort_node *node,
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struct acpi_iort_node *iommu,
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struct device *dev, struct list_head *head)
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{
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struct acpi_iort_node *smmu = NULL;
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struct acpi_iort_rmr *rmr;
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struct acpi_iort_id_mapping *map;
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u32 *sids = NULL;
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u32 num_sids = 0;
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int i;
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if (!node->mapping_offset || !node->mapping_count) {
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pr_err(FW_BUG "Invalid ID mapping, skipping RMR node %p\n",
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node);
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return;
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}
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rmr = (struct acpi_iort_rmr *)node->node_data;
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if (!rmr->rmr_offset || !rmr->rmr_count)
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return;
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map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
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node->mapping_offset);
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/*
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* Go through the ID mappings and see if we have a match for SMMU
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* and dev(if !NULL). If found, get the sids for the Node.
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* Please note, id_count is equal to the number of IDs in the
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* range minus one.
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*/
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for (i = 0; i < node->mapping_count; i++, map++) {
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struct acpi_iort_node *parent;
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if (!map->id_count)
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continue;
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parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
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map->output_reference);
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if (parent != iommu)
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continue;
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/* If dev is valid, check RMR node corresponds to the dev SID */
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if (dev && !iort_rmr_has_dev(dev, map->output_base,
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map->id_count))
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continue;
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/* Retrieve SIDs associated with the Node. */
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sids = iort_rmr_alloc_sids(sids, num_sids, map->output_base,
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map->id_count + 1);
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if (!sids)
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return;
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num_sids += map->id_count + 1;
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}
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if (!sids)
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return;
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iort_get_rmrs(node, smmu, sids, num_sids, head);
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kfree(sids);
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}
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static void iort_find_rmrs(struct acpi_iort_node *iommu, struct device *dev,
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struct list_head *head)
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{
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struct acpi_table_iort *iort;
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struct acpi_iort_node *iort_node, *iort_end;
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int i;
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/* Only supports ARM DEN 0049E.d onwards */
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if (iort_table->revision < 5)
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return;
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iort = (struct acpi_table_iort *)iort_table;
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iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
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iort->node_offset);
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iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
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iort_table->length);
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for (i = 0; i < iort->node_count; i++) {
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if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
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"IORT node pointer overflows, bad table!\n"))
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return;
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if (iort_node->type == ACPI_IORT_NODE_RMR)
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iort_node_get_rmr_info(iort_node, iommu, dev, head);
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iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
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iort_node->length);
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}
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}
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/*
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* Populate the RMR list associated with a given IOMMU and dev(if provided).
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* If dev is NULL, the function populates all the RMRs associated with the
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* given IOMMU.
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*/
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static void iort_iommu_rmr_get_resv_regions(struct fwnode_handle *iommu_fwnode,
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struct device *dev,
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struct list_head *head)
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{
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struct acpi_iort_node *iommu;
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iommu = iort_get_iort_node(iommu_fwnode);
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if (!iommu)
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return;
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iort_find_rmrs(iommu, dev, head);
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}
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static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev)
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{
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struct acpi_iort_node *iommu;
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@ -868,7 +1156,10 @@ static void iort_iommu_msi_get_resv_regions(struct device *dev,
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*/
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void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head)
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{
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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iort_iommu_msi_get_resv_regions(dev, head);
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iort_iommu_rmr_get_resv_regions(fwspec->iommu_fwnode, dev, head);
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}
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static inline bool iort_iommu_driver_enabled(u8 type)
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@ -146,6 +146,14 @@ struct iommu_resv_region {
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void (*free)(struct device *dev, struct iommu_resv_region *region);
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};
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struct iommu_iort_rmr_data {
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struct iommu_resv_region rr;
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/* Stream IDs associated with IORT RMR entry */
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const u32 *sids;
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u32 num_sids;
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};
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/**
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* enum iommu_dev_features - Per device IOMMU features
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* @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
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