ALSA: hda: Add dma stop delay variable
A variable dma_stop_delay is added as a new member in hdac_bus structure to avoid memory decode error incase DMA RUN bit is not disabled in the given timeout from snd_hdac_stream_sync function and followed by stream reset which results in memory decode error between reset set and clear operation. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Link: https://lore.kernel.org/r/20200805095221.5476-3-mkumard@nvidia.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
parent
6c17e9dd5c
commit
4106820b90
|
@ -347,6 +347,9 @@ struct hdac_bus {
|
|||
|
||||
int bdl_pos_adj; /* BDL position adjustment */
|
||||
|
||||
/* delay time in us for dma stop */
|
||||
unsigned int dma_stop_delay;
|
||||
|
||||
/* locks */
|
||||
spinlock_t reg_lock;
|
||||
struct mutex cmd_mutex;
|
||||
|
|
|
@ -150,9 +150,12 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
|
|||
{
|
||||
unsigned char val;
|
||||
int timeout;
|
||||
int dma_run_state;
|
||||
|
||||
snd_hdac_stream_clear(azx_dev);
|
||||
|
||||
dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
|
||||
|
||||
snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
|
||||
udelay(3);
|
||||
timeout = 300;
|
||||
|
@ -162,6 +165,10 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
|
|||
if (val)
|
||||
break;
|
||||
} while (--timeout);
|
||||
|
||||
if (azx_dev->bus->dma_stop_delay && dma_run_state)
|
||||
udelay(azx_dev->bus->dma_stop_delay);
|
||||
|
||||
val &= ~SD_CTL_STREAM_RESET;
|
||||
snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
|
||||
udelay(3);
|
||||
|
|
Loading…
Reference in New Issue