ASoC: amd: add I2S MICSP instance support
Add I2S MICSP instance support for Stoney variant. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20220701114107.1105948-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -433,6 +433,7 @@ static void acp_dma_start(void __iomem *acp_mmio, u16 ch_num, bool is_circular)
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case I2S_TO_ACP_DMA_CH_NUM:
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case ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM:
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case I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM:
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case ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM:
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dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
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break;
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default:
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@ -710,6 +711,13 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
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acp_mmio, mmACP_EXTERNAL_INTR_STAT);
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}
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if ((intr_flag & BIT(ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM)) != 0) {
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valid_irq = true;
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snd_pcm_period_elapsed(irq_data->play_i2s_micsp_stream);
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acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM)) << 16,
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acp_mmio, mmACP_EXTERNAL_INTR_STAT);
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}
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if ((intr_flag & BIT(ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM)) != 0) {
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valid_irq = true;
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snd_pcm_period_elapsed(irq_data->play_i2sbt_stream);
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@ -807,7 +815,8 @@ static int acp_dma_open(struct snd_soc_component *component,
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* stream is not closed
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*/
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if (!intr_data->play_i2ssp_stream && !intr_data->capture_i2ssp_stream &&
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!intr_data->play_i2sbt_stream && !intr_data->capture_i2sbt_stream)
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!intr_data->play_i2sbt_stream && !intr_data->capture_i2sbt_stream &&
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!intr_data->play_i2s_micsp_stream)
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acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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@ -867,6 +876,9 @@ static int acp_dma_hw_params(struct snd_soc_component *component,
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case I2S_BT_INSTANCE:
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val |= ACP_I2S_BT_16BIT_RESOLUTION_EN;
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break;
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case I2S_MICSP_INSTANCE:
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val |= ACP_I2S_MICSP_16BIT_RESOLUTION_EN;
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break;
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case I2S_SP_INSTANCE:
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default:
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val |= ACP_I2S_SP_16BIT_RESOLUTION_EN;
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@ -876,6 +888,7 @@ static int acp_dma_hw_params(struct snd_soc_component *component,
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case I2S_BT_INSTANCE:
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val |= ACP_I2S_BT_16BIT_RESOLUTION_EN;
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break;
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case I2S_MICSP_INSTANCE:
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case I2S_SP_INSTANCE:
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default:
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val |= ACP_I2S_MIC_16BIT_RESOLUTION_EN;
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@ -901,6 +914,27 @@ static int acp_dma_hw_params(struct snd_soc_component *component,
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mmACP_I2S_BT_TRANSMIT_BYTE_CNT_LOW;
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adata->play_i2sbt_stream = substream;
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break;
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case I2S_MICSP_INSTANCE:
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switch (adata->asic_type) {
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case CHIP_STONEY:
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rtd->pte_offset = ACP_ST_PLAYBACK_PTE_OFFSET;
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break;
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default:
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rtd->pte_offset = ACP_PLAYBACK_PTE_OFFSET;
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}
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rtd->ch1 = SYSRAM_TO_ACP_MICSP_INSTANCE_CH_NUM;
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rtd->ch2 = ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM;
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rtd->sram_bank = ACP_SRAM_BANK_1_ADDRESS;
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rtd->destination = TO_ACP_I2S_2;
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rtd->dma_dscr_idx_1 = PLAYBACK_START_DMA_DESCR_CH4;
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rtd->dma_dscr_idx_2 = PLAYBACK_START_DMA_DESCR_CH5;
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rtd->byte_cnt_high_reg_offset =
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mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_HIGH;
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rtd->byte_cnt_low_reg_offset =
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mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_LOW;
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adata->play_i2s_micsp_stream = substream;
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break;
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case I2S_SP_INSTANCE:
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default:
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switch (adata->asic_type) {
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@ -939,6 +973,7 @@ static int acp_dma_hw_params(struct snd_soc_component *component,
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rtd->dma_curr_dscr = mmACP_DMA_CUR_DSCR_11;
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adata->capture_i2sbt_stream = substream;
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break;
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case I2S_MICSP_INSTANCE:
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case I2S_SP_INSTANCE:
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default:
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rtd->pte_offset = ACP_CAPTURE_PTE_OFFSET;
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@ -1160,6 +1195,9 @@ static int acp_dma_close(struct snd_soc_component *component,
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case I2S_BT_INSTANCE:
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adata->play_i2sbt_stream = NULL;
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break;
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case I2S_MICSP_INSTANCE:
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adata->play_i2s_micsp_stream = NULL;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->play_i2ssp_stream = NULL;
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@ -1181,6 +1219,7 @@ static int acp_dma_close(struct snd_soc_component *component,
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case I2S_BT_INSTANCE:
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adata->capture_i2sbt_stream = NULL;
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break;
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case I2S_MICSP_INSTANCE:
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case I2S_SP_INSTANCE:
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default:
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adata->capture_i2ssp_stream = NULL;
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@ -1197,7 +1236,8 @@ static int acp_dma_close(struct snd_soc_component *component,
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* another stream is also not active.
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*/
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if (!adata->play_i2ssp_stream && !adata->capture_i2ssp_stream &&
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!adata->play_i2sbt_stream && !adata->capture_i2sbt_stream)
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!adata->play_i2sbt_stream && !adata->capture_i2sbt_stream &&
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!adata->play_i2s_micsp_stream)
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acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
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kfree(rtd);
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return 0;
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@ -1245,6 +1285,7 @@ static int acp_audio_probe(struct platform_device *pdev)
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audio_drv_data->capture_i2ssp_stream = NULL;
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audio_drv_data->play_i2sbt_stream = NULL;
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audio_drv_data->capture_i2sbt_stream = NULL;
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audio_drv_data->play_i2s_micsp_stream = NULL;
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audio_drv_data->asic_type = *pdata;
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@ -1333,6 +1374,11 @@ static int acp_pcm_resume(struct device *dev)
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config_acp_dma(adata->acp_mmio, rtd, adata->asic_type);
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}
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if (adata->asic_type != CHIP_CARRIZO) {
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if (adata->play_i2s_micsp_stream &&
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adata->play_i2s_micsp_stream->runtime) {
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rtd = adata->play_i2s_micsp_stream->runtime->private_data;
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config_acp_dma(adata->acp_mmio, rtd, adata->asic_type);
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}
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if (adata->play_i2sbt_stream &&
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adata->play_i2sbt_stream->runtime) {
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rtd = adata->play_i2sbt_stream->runtime->private_data;
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@ -55,6 +55,7 @@
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#define I2S_SP_INSTANCE 0x01
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#define I2S_BT_INSTANCE 0x02
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#define I2S_MICSP_INSTANCE 0x03
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#define CAP_CHANNEL0 0x00
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#define CAP_CHANNEL1 0x01
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@ -85,6 +86,10 @@
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#define I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM 10
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#define ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM 11
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/* Playback DMA channels for I2S MICSP instance */
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#define SYSRAM_TO_ACP_MICSP_INSTANCE_CH_NUM 4
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#define ACP_TO_I2S_DMA_MICSP_INSTANCE_CH_NUM 5
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#define NUM_DSCRS_PER_CHANNEL 2
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#define PLAYBACK_START_DMA_DESCR_CH12 0
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@ -108,8 +113,15 @@
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#define CAPTURE_START_DMA_DESCR_CH11 14
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#define CAPTURE_END_DMA_DESCR_CH11 15
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/* I2S MICSP Instance DMA Descriptors */
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#define PLAYBACK_START_DMA_DESCR_CH4 0
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#define PLAYBACK_END_DMA_DESCR_CH4 1
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#define PLAYBACK_START_DMA_DESCR_CH5 2
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#define PLAYBACK_END_DMA_DESCR_CH5 3
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#define mmACP_I2S_16BIT_RESOLUTION_EN 0x5209
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#define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01
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#define ACP_I2S_MICSP_16BIT_RESOLUTION_EN 0x01
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#define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02
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#define ACP_I2S_BT_16BIT_RESOLUTION_EN 0x04
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#define ACP_BT_UART_PAD_SELECT_MASK 0x1
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@ -149,6 +161,7 @@ struct audio_drv_data {
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struct snd_pcm_substream *capture_i2ssp_stream;
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struct snd_pcm_substream *play_i2sbt_stream;
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struct snd_pcm_substream *capture_i2sbt_stream;
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struct snd_pcm_substream *play_i2s_micsp_stream;
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void __iomem *acp_mmio;
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u32 asic_type;
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snd_pcm_sframes_t delay;
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