ASoC: rt5682s: Reduce coupling of PLLB setting
Some parts of rt5682s CCF function are implemented by 'PLLB' dapm widget. The coupling risk exists, so this patch fixes it. Signed-off-by: Derek Fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/20220913025658.5005-3-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1155,30 +1155,53 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
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return 0;
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}
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static int set_filter_clk(struct snd_soc_dapm_widget *w,
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static int rt5682s_set_pllb_power(struct rt5682s_priv *rt5682s, int on)
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{
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struct snd_soc_component *component = rt5682s->component;
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if (on) {
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snd_soc_component_update_bits(component, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_LDO_PLLB | RT5682S_PWR_BIAS_PLLB | RT5682S_PWR_PLLB,
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RT5682S_PWR_LDO_PLLB | RT5682S_PWR_BIAS_PLLB | RT5682S_PWR_PLLB);
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snd_soc_component_update_bits(component, RT5682S_PWR_ANLG_3,
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RT5682S_RSTB_PLLB, RT5682S_RSTB_PLLB);
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} else {
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snd_soc_component_update_bits(component, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_LDO_PLLB | RT5682S_PWR_BIAS_PLLB |
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RT5682S_RSTB_PLLB | RT5682S_PWR_PLLB, 0);
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}
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return 0;
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}
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static int set_pllb_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
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int ref, val, reg, idx;
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int on = 0;
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if (rt5682s->wclk_enabled)
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return 0;
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if (SND_SOC_DAPM_EVENT_ON(event))
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on = 1;
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rt5682s_set_pllb_power(rt5682s, on);
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return 0;
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}
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static void rt5682s_set_filter_clk(struct rt5682s_priv *rt5682s, int reg, int ref)
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{
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struct snd_soc_component *component = rt5682s->component;
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int idx;
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static const int div_f[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48};
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static const int div_o[] = {1, 2, 4, 6, 8, 12, 16, 24, 32, 48};
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val = snd_soc_component_read(component, RT5682S_GPIO_CTRL_1)
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& RT5682S_GP4_PIN_MASK;
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if (w->shift == RT5682S_PWR_ADC_S1F_BIT && val == RT5682S_GP4_PIN_ADCDAT2)
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ref = 256 * rt5682s->lrck[RT5682S_AIF2];
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else
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ref = 256 * rt5682s->lrck[RT5682S_AIF1];
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idx = rt5682s_div_sel(rt5682s, ref, div_f, ARRAY_SIZE(div_f));
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if (w->shift == RT5682S_PWR_ADC_S1F_BIT)
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reg = RT5682S_PLL_TRACK_3;
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else
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reg = RT5682S_PLL_TRACK_2;
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snd_soc_component_update_bits(component, reg,
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RT5682S_FILTER_CLK_DIV_MASK, idx << RT5682S_FILTER_CLK_DIV_SFT);
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@ -1191,6 +1214,29 @@ static int set_filter_clk(struct snd_soc_dapm_widget *w,
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snd_soc_component_update_bits(component, RT5682S_ADDA_CLK_1,
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RT5682S_ADC_OSR_MASK | RT5682S_DAC_OSR_MASK,
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(idx << RT5682S_ADC_OSR_SFT) | (idx << RT5682S_DAC_OSR_SFT));
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}
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static int set_filter_clk(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
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int ref, reg, val;
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val = snd_soc_component_read(component, RT5682S_GPIO_CTRL_1)
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& RT5682S_GP4_PIN_MASK;
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if (w->shift == RT5682S_PWR_ADC_S1F_BIT && val == RT5682S_GP4_PIN_ADCDAT2)
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ref = 256 * rt5682s->lrck[RT5682S_AIF2];
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else
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ref = 256 * rt5682s->lrck[RT5682S_AIF1];
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if (w->shift == RT5682S_PWR_ADC_S1F_BIT)
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reg = RT5682S_PLL_TRACK_3;
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else
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reg = RT5682S_PLL_TRACK_2;
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rt5682s_set_filter_clk(rt5682s, reg, ref);
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return 0;
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}
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@ -1633,20 +1679,14 @@ static const struct snd_soc_dapm_widget rt5682s_dapm_widgets[] = {
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/* PLL Powers */
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SND_SOC_DAPM_SUPPLY_S("PLLA_LDO", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_LDO_PLLA_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLB_LDO", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_LDO_PLLB_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLA_BIAS", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_BIAS_PLLA_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLB_BIAS", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_BIAS_PLLB_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLA", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_PLLA_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLB", 0, RT5682S_PWR_ANLG_3,
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RT5682S_PWR_PLLB_BIT, 0, set_filter_clk, SND_SOC_DAPM_PRE_PMU),
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SND_SOC_DAPM_SUPPLY_S("PLLA_RST", 1, RT5682S_PWR_ANLG_3,
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RT5682S_RSTB_PLLA_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY_S("PLLB_RST", 1, RT5682S_PWR_ANLG_3,
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RT5682S_RSTB_PLLB_BIT, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLLB", SND_SOC_NOPM, 0, 0,
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set_pllb_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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/* ASRC */
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SND_SOC_DAPM_SUPPLY_S("DAC STO1 ASRC", 1, RT5682S_PLL_TRACK_1,
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@ -1813,9 +1853,6 @@ static const struct snd_soc_dapm_route rt5682s_dapm_routes[] = {
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{"PLLA", NULL, "PLLA_LDO"},
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{"PLLA", NULL, "PLLA_BIAS"},
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{"PLLA", NULL, "PLLA_RST"},
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{"PLLB", NULL, "PLLB_LDO"},
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{"PLLB", NULL, "PLLB_BIAS"},
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{"PLLB", NULL, "PLLB_RST"},
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/*ASRC*/
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{"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
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@ -2479,7 +2516,7 @@ static int rt5682s_wclk_prepare(struct clk_hw *hw)
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struct rt5682s_priv *rt5682s =
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container_of(hw, struct rt5682s_priv, dai_clks_hw[RT5682S_DAI_WCLK_IDX]);
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struct snd_soc_component *component = rt5682s->component;
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
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int ref, reg;
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if (!rt5682s_clk_check(rt5682s))
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return -EINVAL;
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@ -2498,18 +2535,16 @@ static int rt5682s_wclk_prepare(struct clk_hw *hw)
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RT5682S_DIG_GATE_CTRL, RT5682S_DIG_GATE_CTRL);
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rt5682s_set_i2s(rt5682s, RT5682S_AIF1, 1);
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/* Only need to power on PLLB due to the rate set restriction */
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reg = RT5682S_PLL_TRACK_2;
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ref = 256 * rt5682s->lrck[RT5682S_AIF1];
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rt5682s_set_filter_clk(rt5682s, reg, ref);
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rt5682s_set_pllb_power(rt5682s, 1);
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rt5682s->wclk_enabled = 1;
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mutex_unlock(&rt5682s->wclk_mutex);
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snd_soc_dapm_mutex_lock(dapm);
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/* Only need to power PLLB due to the rate set restriction */
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snd_soc_dapm_force_enable_pin_unlocked(dapm, "PLLB");
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snd_soc_dapm_sync_unlocked(dapm);
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snd_soc_dapm_mutex_unlock(dapm);
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return 0;
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}
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@ -2518,7 +2553,6 @@ static void rt5682s_wclk_unprepare(struct clk_hw *hw)
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struct rt5682s_priv *rt5682s =
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container_of(hw, struct rt5682s_priv, dai_clks_hw[RT5682S_DAI_WCLK_IDX]);
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struct snd_soc_component *component = rt5682s->component;
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
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if (!rt5682s_clk_check(rt5682s))
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return;
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@ -2534,16 +2568,12 @@ static void rt5682s_wclk_unprepare(struct clk_hw *hw)
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snd_soc_component_update_bits(component, RT5682S_PWR_DIG_1,
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RT5682S_DIG_GATE_CTRL, 0);
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/* Power down PLLB */
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rt5682s_set_pllb_power(rt5682s, 0);
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rt5682s->wclk_enabled = 0;
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mutex_unlock(&rt5682s->wclk_mutex);
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snd_soc_dapm_mutex_lock(dapm);
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snd_soc_dapm_disable_pin_unlocked(dapm, "PLLB");
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snd_soc_dapm_sync_unlocked(dapm);
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snd_soc_dapm_mutex_unlock(dapm);
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}
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static unsigned long rt5682s_wclk_recalc_rate(struct clk_hw *hw,
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