ARM: remove support for NOMMU ARMv4/v5

It is possible to build MMU-less kernels for Cortex-M base
microcrontrollers as well as a couple of older platforms that
have not been converted to CONFIG_ARCH_MULTIPLATFORM,
specifically ep93xx, footbridge, dove, sa1100 and s3c24xx.

It seems unlikely that anybody has tested those configurations
in recent years, as even building them is frequently broken.
A patch I submitted caused another build time regression
in this configuration. I sent a patch for that, but it seems
better to also remove the option entirely, leaving ARMv7-M
as the only supported Arm NOMMU target for simplicity.

A couple of platforms have dependencies on CONFIG_MMU, those
can all be removed now. Notably, mach-integrator tries to
support MMU-less CPU cores, but those have not actually been
selectable for a long time.

This addresses several build failures in randconfig builds that
have accumulated over the years.

Cc: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-03-09 14:20:20 +01:00
parent a483b1b232
commit 2f618d5ef5
10 changed files with 24 additions and 100 deletions

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@ -292,6 +292,17 @@ config MMU
Select if you want MMU-based virtualised addressing space
support by paged memory management. If unsure, say 'Y'.
config ARM_SINGLE_ARMV7M
def_bool !MMU
select ARM_NVIC
select AUTO_ZRELADDR
select TIMER_OF
select COMMON_CLK
select CPU_V7M
select NO_IOPORT_MAP
select SPARSE_IRQ
select USE_OF
config ARCH_MMAP_RND_BITS_MIN
default 8
@ -306,12 +317,11 @@ config ARCH_MMAP_RND_BITS_MAX
#
choice
prompt "ARM system type"
default ARM_SINGLE_ARMV7M if !MMU
default ARCH_MULTIPLATFORM if MMU
depends on MMU
default ARCH_MULTIPLATFORM
config ARCH_MULTIPLATFORM
bool "Allow multiple platforms to be selected"
depends on MMU
select ARCH_FLATMEM_ENABLE
select ARCH_SPARSEMEM_ENABLE
select ARCH_SELECT_MEMORY_MODEL
@ -326,18 +336,6 @@ config ARCH_MULTIPLATFORM
select SPARSE_IRQ
select USE_OF
config ARM_SINGLE_ARMV7M
bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
depends on !MMU
select ARM_NVIC
select AUTO_ZRELADDR
select TIMER_OF
select COMMON_CLK
select CPU_V7M
select NO_IOPORT_MAP
select SPARSE_IRQ
select USE_OF
config ARCH_EP93XX
bool "EP93xx-based"
select ARCH_SPARSEMEM_ENABLE
@ -357,7 +355,6 @@ config ARCH_FOOTBRIDGE
bool "FootBridge"
select CPU_SA110
select FOOTBRIDGE
select NEED_MACH_IO_H if !MMU
select NEED_MACH_MEMORY_H
help
Support for systems based on the DC21285 companion chip
@ -365,7 +362,6 @@ config ARCH_FOOTBRIDGE
config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
select GPIO_IOP
select GPIOLIB
@ -378,7 +374,6 @@ config ARCH_IOP32X
config ARCH_IXP4XX
bool "IXP4xx-based"
depends on MMU
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_PATCH_PHYS_VIRT
select CPU_XSCALE
@ -411,7 +406,6 @@ config ARCH_DOVE
config ARCH_PXA
bool "PXA2xx/PXA3xx-based"
depends on MMU
select ARCH_MTD_XIP
select ARM_CPU_SUSPEND if PM
select AUTO_ZRELADDR
@ -431,7 +425,6 @@ config ARCH_PXA
config ARCH_RPC
bool "RiscPC"
depends on MMU
depends on !CC_IS_CLANG && GCC_VERSION < 90100 && GCC_VERSION >= 60000
select ARCH_ACORN
select ARCH_MAY_HAVE_PC_FDC
@ -488,7 +481,6 @@ config ARCH_S3C24XX
config ARCH_OMAP1
bool "TI OMAP1"
depends on MMU
select ARCH_OMAP
select CLKSRC_MMIO
select GENERIC_IRQ_CHIP

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@ -185,7 +185,6 @@ config ARCH_BCM_53573
config ARCH_BCM_63XX
bool "Broadcom BCM63xx DSL SoC"
depends on ARCH_MULTI_V7
depends on MMU
select ARCH_HAS_RESET_CONTROLLER
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP

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@ -21,32 +21,26 @@
* 0xf0000000 0x80000000 16MB ISA memory
*/
#ifdef CONFIG_MMU
#define MMU_IO(a, b) (a)
#else
#define MMU_IO(a, b) (b)
#endif
#define XBUS_SIZE 0x00100000
#define XBUS_BASE MMU_IO(0xff800000, 0x40000000)
#define XBUS_BASE 0xff800000
#define ARMCSR_SIZE 0x00100000
#define ARMCSR_BASE MMU_IO(0xfe000000, 0x42000000)
#define ARMCSR_BASE 0xfe000000
#define WFLUSH_SIZE 0x00100000
#define WFLUSH_BASE MMU_IO(0xfd000000, 0x78000000)
#define WFLUSH_BASE 0xfd000000
#define PCIIACK_SIZE 0x00100000
#define PCIIACK_BASE MMU_IO(0xfc000000, 0x79000000)
#define PCIIACK_BASE 0xfc000000
#define PCICFG1_SIZE 0x01000000
#define PCICFG1_BASE MMU_IO(0xfb000000, 0x7a000000)
#define PCICFG1_BASE 0xfb000000
#define PCICFG0_SIZE 0x01000000
#define PCICFG0_BASE MMU_IO(0xfa000000, 0x7b000000)
#define PCICFG0_BASE 0xfa000000
#define PCIMEM_SIZE 0x01000000
#define PCIMEM_BASE MMU_IO(0xf0000000, 0x80000000)
#define PCIMEM_BASE 0xf0000000
#define XBUS_CS2 0x40012000

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@ -1,20 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* arch/arm/mach-footbridge/include/mach/io.h
*
* Copyright (C) 1997-1999 Russell King
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/*
* Translation of various i/o addresses to host addresses for !CONFIG_MMU
*/
#define PCIO_BASE 0x7c000000
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#endif

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@ -42,24 +42,12 @@ config INTEGRATOR_IMPD1
allows ARM(R) Ltd PrimeCells to be developed and evaluated.
The IM-PD1 can be found on the Integrator/PP2 platform.
config INTEGRATOR_CM7TDMI
bool "Integrator/CM7TDMI core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4 && !MMU
select CPU_ARM7TDMI
config INTEGRATOR_CM720T
bool "Integrator/CM720T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T
select CPU_ARM720T
config INTEGRATOR_CM740T
bool "Integrator/CM740T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM740T
config INTEGRATOR_CM920T
bool "Integrator/CM920T core module"
depends on ARCH_INTEGRATOR_AP
@ -78,23 +66,6 @@ config INTEGRATOR_CM926EJS
depends on ARCH_MULTI_V5
select CPU_ARM926T
config INTEGRATOR_CM940T
bool "Integrator/CM940T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM940T
config INTEGRATOR_CM946ES
bool "Integrator/CM946E-S core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V5 && !MMU
select CPU_ARM946E
config INTEGRATOR_CM966ES
bool "Integrator/CM966E-S core module"
depends on ARCH_INTEGRATOR_AP
depends on BROKEN # no kernel support
config INTEGRATOR_CM10200E_REV0
bool "Integrator/CM10200E rev.0 core module"
depends on ARCH_INTEGRATOR_AP && n
@ -127,7 +98,7 @@ config INTEGRATOR_CM1136JFS
config ARCH_INTEGRATOR_CP
bool "Support Integrator/CP platform"
depends on (!MMU || ARCH_MULTI_V5 || ARCH_MULTI_V6)
depends on ARCH_MULTI_V5 || ARCH_MULTI_V6
select ARM_TIMER_SP804
select SERIAL_AMBA_PL011 if TTY
select SERIAL_AMBA_PL011_CONSOLE if TTY
@ -135,12 +106,6 @@ config ARCH_INTEGRATOR_CP
help
Include support for the ARM(R) Integrator CP platform.
config INTEGRATOR_CT7T
bool "Integrator/CT7TD (ARM7TDMI) core tile"
depends on ARCH_INTEGRATOR_CP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM7TDMI
config INTEGRATOR_CT926
bool "Integrator/CT926 (ARM926EJ-S) core tile"
depends on ARCH_INTEGRATOR_CP

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@ -16,12 +16,7 @@
#define IO_START INTEGRATOR_HDR_BASE // PA of IO
/* macro to get at IO space when running virtually */
#ifdef CONFIG_MMU
#define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
#else
#define IO_ADDRESS(x) (x)
#endif
#define __io_address(n) ((void __iomem *)IO_ADDRESS(n))
/*

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@ -2,7 +2,6 @@
config ARCH_NSPIRE
bool "TI-NSPIRE based"
depends on ARCH_MULTI_V4_V5
depends on MMU
select CPU_ARM926T
select GENERIC_IRQ_CHIP
select ARM_AMBA

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
menuconfig ARCH_ORION5X
bool "Marvell Orion"
depends on MMU && ARCH_MULTI_V5
depends on ARCH_MULTI_V5
select CPU_FEROCEON
select GPIOLIB
select MVEBU_MBUS

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
menuconfig ARCH_RENESAS
bool "Renesas ARM SoCs"
depends on ARCH_MULTI_V7 && MMU
depends on ARCH_MULTI_V7
select ARM_GIC
select GPIOLIB
select NO_IOPORT_MAP

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
menuconfig ARCH_U8500
bool "ST-Ericsson U8500 Series"
depends on ARCH_MULTI_V7 && MMU
depends on ARCH_MULTI_V7
select AB8500_CORE
select ABX500_CORE
select ARM_AMBA