perf/arm-cmn: Revamp model detection
[ Upstream commit 7819e05a0d
]
CMN implements a set of CoreSight-format peripheral ID registers which
in principle we should be able to use to identify the hardware. However
so far we have avoided trying to use the part number field since the
TRMs have all described it as "configuration dependent". It turns out,
though, that this is a quirk of the documentation generation process,
and in fact the part number should always be a stable well-defined field
which we can trust.
To that end, revamp our model detection to rely less on ACPI/DT, and
pave the way towards further using the hardware information as an
identifier for userspace jevent metrics. This includes renaming the
revision constants to maximise readability.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-and-tested-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Link: https://lore.kernel.org/r/3c791eaae814b0126f9adbd5419bfb4a600dade7.1686588640.git.robin.murphy@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Stable-dep-of: e3e73f511c49 ("perf/arm-cmn: Fix DTC domain detection")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
4589403a34
commit
28fa550a49
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@ -44,8 +44,11 @@
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#define CMN_MAX_DTMS (CMN_MAX_XPS + (CMN_MAX_DIMENSION - 1) * 4)
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/* The CFG node has various info besides the discovery tree */
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#define CMN_CFGM_PERIPH_ID_2 0x0010
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#define CMN_CFGM_PID2_REVISION GENMASK(7, 4)
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#define CMN_CFGM_PERIPH_ID_01 0x0008
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#define CMN_CFGM_PID0_PART_0 GENMASK_ULL(7, 0)
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#define CMN_CFGM_PID1_PART_1 GENMASK_ULL(35, 32)
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#define CMN_CFGM_PERIPH_ID_23 0x0010
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#define CMN_CFGM_PID2_REVISION GENMASK_ULL(7, 4)
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#define CMN_CFGM_INFO_GLOBAL 0x900
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#define CMN_INFO_MULTIPLE_DTM_EN BIT_ULL(63)
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@ -186,6 +189,7 @@
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#define CMN_WP_DOWN 2
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/* Internal values for encoding event support */
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enum cmn_model {
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CMN600 = 1,
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CMN650 = 2,
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@ -197,26 +201,34 @@ enum cmn_model {
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CMN_650ON = CMN650 | CMN700,
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};
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/* Actual part numbers and revision IDs defined by the hardware */
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enum cmn_part {
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PART_CMN600 = 0x434,
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PART_CMN650 = 0x436,
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PART_CMN700 = 0x43c,
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PART_CI700 = 0x43a,
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};
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/* CMN-600 r0px shouldn't exist in silicon, thankfully */
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enum cmn_revision {
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CMN600_R1P0,
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CMN600_R1P1,
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CMN600_R1P2,
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CMN600_R1P3,
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CMN600_R2P0,
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CMN600_R3P0,
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CMN600_R3P1,
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CMN650_R0P0 = 0,
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CMN650_R1P0,
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CMN650_R1P1,
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CMN650_R2P0,
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CMN650_R1P2,
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CMN700_R0P0 = 0,
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CMN700_R1P0,
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CMN700_R2P0,
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CI700_R0P0 = 0,
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CI700_R1P0,
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CI700_R2P0,
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REV_CMN600_R1P0,
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REV_CMN600_R1P1,
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REV_CMN600_R1P2,
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REV_CMN600_R1P3,
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REV_CMN600_R2P0,
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REV_CMN600_R3P0,
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REV_CMN600_R3P1,
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REV_CMN650_R0P0 = 0,
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REV_CMN650_R1P0,
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REV_CMN650_R1P1,
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REV_CMN650_R2P0,
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REV_CMN650_R1P2,
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REV_CMN700_R0P0 = 0,
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REV_CMN700_R1P0,
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REV_CMN700_R2P0,
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REV_CI700_R0P0 = 0,
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REV_CI700_R1P0,
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REV_CI700_R2P0,
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};
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enum cmn_node_type {
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@ -306,7 +318,7 @@ struct arm_cmn {
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unsigned int state;
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enum cmn_revision rev;
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enum cmn_model model;
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enum cmn_part part;
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u8 mesh_x;
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u8 mesh_y;
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u16 num_xps;
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@ -394,19 +406,35 @@ static struct arm_cmn_node *arm_cmn_node(const struct arm_cmn *cmn,
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return NULL;
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}
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static enum cmn_model arm_cmn_model(const struct arm_cmn *cmn)
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{
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switch (cmn->part) {
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case PART_CMN600:
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return CMN600;
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case PART_CMN650:
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return CMN650;
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case PART_CMN700:
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return CMN700;
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case PART_CI700:
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return CI700;
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default:
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return 0;
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};
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}
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static u32 arm_cmn_device_connect_info(const struct arm_cmn *cmn,
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const struct arm_cmn_node *xp, int port)
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{
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int offset = CMN_MXP__CONNECT_INFO(port);
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if (port >= 2) {
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if (cmn->model & (CMN600 | CMN650))
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if (cmn->part == PART_CMN600 || cmn->part == PART_CMN650)
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return 0;
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/*
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* CI-700 may have extra ports, but still has the
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* mesh_port_connect_info registers in the way.
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*/
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if (cmn->model == CI700)
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if (cmn->part == PART_CI700)
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offset += CI700_CONNECT_INFO_P2_5_OFFSET;
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}
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@ -640,7 +668,7 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
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eattr = container_of(attr, typeof(*eattr), attr.attr);
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if (!(eattr->model & cmn->model))
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if (!(eattr->model & arm_cmn_model(cmn)))
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return 0;
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type = eattr->type;
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@ -658,7 +686,7 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
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if ((intf & 4) && !(cmn->ports_used & BIT(intf & 3)))
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return 0;
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if (chan == 4 && cmn->model == CMN600)
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if (chan == 4 && cmn->part == PART_CMN600)
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return 0;
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if ((chan == 5 && cmn->rsp_vc_num < 2) ||
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@ -669,19 +697,19 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
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}
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/* Revision-specific differences */
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if (cmn->model == CMN600) {
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if (cmn->rev < CMN600_R1P3) {
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if (cmn->part == PART_CMN600) {
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if (cmn->rev < REV_CMN600_R1P3) {
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if (type == CMN_TYPE_CXRA && eventid > 0x10)
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return 0;
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}
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if (cmn->rev < CMN600_R1P2) {
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if (cmn->rev < REV_CMN600_R1P2) {
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if (type == CMN_TYPE_HNF && eventid == 0x1b)
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return 0;
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if (type == CMN_TYPE_CXRA || type == CMN_TYPE_CXHA)
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return 0;
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}
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} else if (cmn->model == CMN650) {
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if (cmn->rev < CMN650_R2P0 || cmn->rev == CMN650_R1P2) {
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} else if (cmn->part == PART_CMN650) {
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if (cmn->rev < REV_CMN650_R2P0 || cmn->rev == REV_CMN650_R1P2) {
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if (type == CMN_TYPE_HNF && eventid > 0x22)
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return 0;
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if (type == CMN_TYPE_SBSX && eventid == 0x17)
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@ -689,8 +717,8 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj,
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if (type == CMN_TYPE_RNI && eventid > 0x10)
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return 0;
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}
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} else if (cmn->model == CMN700) {
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if (cmn->rev < CMN700_R2P0) {
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} else if (cmn->part == PART_CMN700) {
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if (cmn->rev < REV_CMN700_R2P0) {
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if (type == CMN_TYPE_HNF && eventid > 0x2c)
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return 0;
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if (type == CMN_TYPE_CCHA && eventid > 0x74)
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if (type == CMN_TYPE_CCLA && eventid > 0x27)
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return 0;
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}
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if (cmn->rev < CMN700_R1P0) {
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if (cmn->rev < REV_CMN700_R1P0) {
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if (type == CMN_TYPE_HNF && eventid > 0x2b)
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return 0;
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}
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@ -1200,7 +1228,7 @@ static u32 arm_cmn_wp_config(struct perf_event *event)
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u32 grp = CMN_EVENT_WP_GRP(event);
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u32 exc = CMN_EVENT_WP_EXCLUSIVE(event);
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u32 combine = CMN_EVENT_WP_COMBINE(event);
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bool is_cmn600 = to_cmn(event->pmu)->model == CMN600;
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bool is_cmn600 = to_cmn(event->pmu)->part == PART_CMN600;
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config = FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL, dev) |
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FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_CHN_SEL, chn) |
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return ret;
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}
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static enum cmn_filter_select arm_cmn_filter_sel(enum cmn_model model,
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static enum cmn_filter_select arm_cmn_filter_sel(const struct arm_cmn *cmn,
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enum cmn_node_type type,
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unsigned int eventid)
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{
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struct arm_cmn_event_attr *e;
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int i;
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enum cmn_model model = arm_cmn_model(cmn);
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for (i = 0; i < ARRAY_SIZE(arm_cmn_event_attrs) - 1; i++) {
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for (int i = 0; i < ARRAY_SIZE(arm_cmn_event_attrs) - 1; i++) {
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e = container_of(arm_cmn_event_attrs[i], typeof(*e), attr.attr);
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if (e->model & model && e->type == type && e->eventid == eventid)
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return e->fsel;
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/* ...but the DTM may depend on which port we're watching */
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if (cmn->multi_dtm)
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hw->dtm_offset = CMN_EVENT_WP_DEV_SEL(event) / 2;
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} else if (type == CMN_TYPE_XP && cmn->model == CMN700) {
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} else if (type == CMN_TYPE_XP && cmn->part == PART_CMN700) {
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hw->wide_sel = true;
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}
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/* This is sufficiently annoying to recalculate, so cache it */
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hw->filter_sel = arm_cmn_filter_sel(cmn->model, type, eventid);
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hw->filter_sel = arm_cmn_filter_sel(cmn, type, eventid);
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bynodeid = CMN_EVENT_BYNODEID(event);
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nodeid = CMN_EVENT_NODEID(event);
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void __iomem *cfg_region;
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struct arm_cmn_node cfg, *dn;
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struct arm_cmn_dtm *dtm;
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enum cmn_part part;
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u16 child_count, child_poff;
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u32 xp_offset[CMN_MAX_XPS];
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u64 reg;
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return -ENODEV;
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cfg_region = cmn->base + rgn_offset;
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reg = readl_relaxed(cfg_region + CMN_CFGM_PERIPH_ID_2);
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reg = readq_relaxed(cfg_region + CMN_CFGM_PERIPH_ID_01);
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part = FIELD_GET(CMN_CFGM_PID0_PART_0, reg);
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part |= FIELD_GET(CMN_CFGM_PID1_PART_1, reg) << 8;
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if (cmn->part && cmn->part != part)
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dev_warn(cmn->dev,
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"Firmware binding mismatch: expected part number 0x%x, found 0x%x\n",
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cmn->part, part);
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cmn->part = part;
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if (!arm_cmn_model(cmn))
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dev_warn(cmn->dev, "Unknown part number: 0x%x\n", part);
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reg = readl_relaxed(cfg_region + CMN_CFGM_PERIPH_ID_23);
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cmn->rev = FIELD_GET(CMN_CFGM_PID2_REVISION, reg);
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reg = readq_relaxed(cfg_region + CMN_CFGM_INFO_GLOBAL);
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if (xp->id == (1 << 3))
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cmn->mesh_x = xp->logid;
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if (cmn->model == CMN600)
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if (cmn->part == PART_CMN600)
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xp->dtc = 0xf;
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else
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xp->dtc = 1 << readl_relaxed(xp_region + CMN_DTM_UNIT_INFO);
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if (cmn->num_xps == 1)
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dev_warn(cmn->dev, "1x1 config not fully supported, translate XP events manually\n");
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dev_dbg(cmn->dev, "model %d, periph_id_2 revision %d\n", cmn->model, cmn->rev);
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dev_dbg(cmn->dev, "periph_id part 0x%03x revision %d\n", cmn->part, cmn->rev);
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reg = cmn->ports_used;
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dev_dbg(cmn->dev, "mesh %dx%d, ID width %d, ports %6pbl%s\n",
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cmn->mesh_x, cmn->mesh_y, arm_cmn_xyidbits(cmn), ®,
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return -ENOMEM;
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cmn->dev = &pdev->dev;
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cmn->model = (unsigned long)device_get_match_data(cmn->dev);
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cmn->part = (unsigned long)device_get_match_data(cmn->dev);
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platform_set_drvdata(pdev, cmn);
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if (cmn->model == CMN600 && has_acpi_companion(cmn->dev)) {
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if (cmn->part == PART_CMN600 && has_acpi_companion(cmn->dev)) {
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rootnode = arm_cmn600_acpi_probe(pdev, cmn);
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} else {
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rootnode = 0;
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cmn->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(cmn->base))
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return PTR_ERR(cmn->base);
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if (cmn->model == CMN600)
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if (cmn->part == PART_CMN600)
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rootnode = arm_cmn600_of_probe(pdev->dev.of_node);
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}
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if (rootnode < 0)
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#ifdef CONFIG_OF
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static const struct of_device_id arm_cmn_of_match[] = {
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{ .compatible = "arm,cmn-600", .data = (void *)CMN600 },
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{ .compatible = "arm,cmn-650", .data = (void *)CMN650 },
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{ .compatible = "arm,cmn-700", .data = (void *)CMN700 },
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{ .compatible = "arm,ci-700", .data = (void *)CI700 },
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{ .compatible = "arm,cmn-600", .data = (void *)PART_CMN600 },
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{ .compatible = "arm,cmn-650" },
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{ .compatible = "arm,cmn-700" },
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{ .compatible = "arm,ci-700" },
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{}
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};
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MODULE_DEVICE_TABLE(of, arm_cmn_of_match);
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id arm_cmn_acpi_match[] = {
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{ "ARMHC600", CMN600 },
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{ "ARMHC650", CMN650 },
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{ "ARMHC700", CMN700 },
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{ "ARMHC600", PART_CMN600 },
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{ "ARMHC650" },
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{ "ARMHC700" },
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{}
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};
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MODULE_DEVICE_TABLE(acpi, arm_cmn_acpi_match);
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