clocksource/drivers/riscv: Patch riscv_clock_next_event() jump before first use
A static key is used to select between SBI and Sstc timer usage in
riscv_clock_next_event(), but currently the direction is resolved
after cpuhp_setup_state() is called (which sets the next event). The
first event will therefore fall through the sbi_set_timer() path; this
breaks Sstc-only systems. So, apply the jump patching before first
use.
Fixes: 9f7a8ff639
("RISC-V: Prefer sstc extension if available")
Signed-off-by: Matt Evans <mev@rivosinc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/CDDAB2D0-264E-42F3-8E31-BA210BEB8EC1@rivosinc.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
parent
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@ -192,6 +192,11 @@ static int __init riscv_timer_init_dt(struct device_node *n)
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return error;
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}
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if (riscv_isa_extension_available(NULL, SSTC)) {
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pr_info("Timer interrupt in S-mode is available via sstc extension\n");
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static_branch_enable(&riscv_sstc_available);
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}
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error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
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"clockevents/riscv/timer:starting",
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riscv_timer_starting_cpu, riscv_timer_dying_cpu);
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@ -199,11 +204,6 @@ static int __init riscv_timer_init_dt(struct device_node *n)
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pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
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error);
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if (riscv_isa_extension_available(NULL, SSTC)) {
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pr_info("Timer interrupt in S-mode is available via sstc extension\n");
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static_branch_enable(&riscv_sstc_available);
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}
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return error;
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}
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