ASoC: codecs: es8316: Add support for 24 MHz MCLK
commit be7dc10ab0
upstream.
MCLK operates on 24MHz on Intel KabyLake-based platforms. To support
that frequency add new MCLK-LRCK ratio.
While at it, utilize ARRAY_SIZE rather than hardcode to improve
robustness.
Cc: Zhu Ning <zhuning@everest-semi.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20230629112449.1755928-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
8e26f53d2e
commit
1533cf80ef
|
@ -27,9 +27,9 @@
|
||||||
* MCLK/LRCK ratios, but we also add ratio 400, which is commonly used on
|
* MCLK/LRCK ratios, but we also add ratio 400, which is commonly used on
|
||||||
* Intel Cherry Trail platforms (19.2MHz MCLK, 48kHz LRCK).
|
* Intel Cherry Trail platforms (19.2MHz MCLK, 48kHz LRCK).
|
||||||
*/
|
*/
|
||||||
#define NR_SUPPORTED_MCLK_LRCK_RATIOS 6
|
#define NR_SUPPORTED_MCLK_LRCK_RATIOS ARRAY_SIZE(supported_mclk_lrck_ratios)
|
||||||
static const unsigned int supported_mclk_lrck_ratios[] = {
|
static const unsigned int supported_mclk_lrck_ratios[] = {
|
||||||
256, 384, 400, 512, 768, 1024
|
256, 384, 400, 500, 512, 768, 1024
|
||||||
};
|
};
|
||||||
|
|
||||||
struct es8316_priv {
|
struct es8316_priv {
|
||||||
|
|
Loading…
Reference in New Issue