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x86/returnthunk: Allow different return thunks 

Upstream commit: 770ae1b709

In preparation for call depth tracking on Intel SKL CPUs, make it possible
to patch in a SKL specific return thunk.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220915111147.680469665@infradead.org
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Peter Zijlstra 2022-09-15 13:11:25 +02:00 committed by Greg Kroah-Hartman
parent 786f089086
commit 1221b8ea25
5 changed files with 22 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/x86/include/asm/nospec-branch.h
View File

@ -222,6 +222,12 @@ extern void srso_alias_untrain_ret(void);
extern void entry_untrain_ret(void); extern void entry_untrain_ret(void);
extern void entry_ibpb(void); extern void entry_ibpb(void);
#ifdef CONFIG_CALL_THUNKS
extern void (*x86_return_thunk)(void);
#else
#define x86_return_thunk (&__x86_return_thunk)
#endif
#ifdef CONFIG_RETPOLINE #ifdef CONFIG_RETPOLINE
#define GEN(reg) \ #define GEN(reg) \

17
arch/x86/kernel/alternative.c
View File

@ -536,6 +536,11 @@ void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)
} }
#ifdef CONFIG_RETHUNK #ifdef CONFIG_RETHUNK
#ifdef CONFIG_CALL_THUNKS
void (*x86_return_thunk)(void) __ro_after_init = &__x86_return_thunk;
#endif
/* /*
* Rewrite the compiler generated return thunk tail-calls. * Rewrite the compiler generated return thunk tail-calls.
* *
@ -551,14 +556,18 @@ static int patch_return(void *addr, struct insn *insn, u8 *bytes)
{ {
int i = 0; int i = 0;
if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) {
return -1; if (x86_return_thunk == __x86_return_thunk)
return -1;
bytes[i++] = RET_INSN_OPCODE; i = JMP32_INSN_SIZE;
__text_gen_insn(bytes, JMP32_INSN_OPCODE, addr, x86_return_thunk, i);
} else {
bytes[i++] = RET_INSN_OPCODE;
}
for (; i < insn->length;) for (; i < insn->length;)
bytes[i++] = INT3_INSN_OPCODE; bytes[i++] = INT3_INSN_OPCODE;
return i; return i;
} }

2
arch/x86/kernel/ftrace.c
View File

@ -361,7 +361,7 @@ create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)
ip = trampoline + size; ip = trampoline + size;
if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
__text_gen_insn(ip, JMP32_INSN_OPCODE, ip, &__x86_return_thunk, JMP32_INSN_SIZE); __text_gen_insn(ip, JMP32_INSN_OPCODE, ip, x86_return_thunk, JMP32_INSN_SIZE);
else else
memcpy(ip, retq, sizeof(retq)); memcpy(ip, retq, sizeof(retq));

2
arch/x86/kernel/static_call.c
View File

@ -80,7 +80,7 @@ static void __ref __static_call_transform(void *insn, enum insn_type type,
case RET: case RET:
if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
code = text_gen_insn(JMP32_INSN_OPCODE, insn, &__x86_return_thunk); code = text_gen_insn(JMP32_INSN_OPCODE, insn, x86_return_thunk);
else else
code = &retinsn; code = &retinsn;
break; break;

2
arch/x86/net/bpf_jit_comp.c
View File

@ -432,7 +432,7 @@ static void emit_return(u8 **pprog, u8 *ip)
u8 *prog = *pprog; u8 *prog = *pprog;
if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) { if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) {
emit_jump(&prog, &__x86_return_thunk, ip); emit_jump(&prog, x86_return_thunk, ip);
} else { } else {
EMIT1(0xC3); /* ret */ EMIT1(0xC3); /* ret */
if (IS_ENABLED(CONFIG_SLS)) if (IS_ENABLED(CONFIG_SLS))