Merge branch 'r8169-fixes'
Chunhao Lin says: ==================== r8169: fix dmar pte write access is not set error This series fixes dmar pte write access is not set error. Chunhao Lin (2): r8169: move rtl_wol_enable_rx() and rtl_prepare_power_down() r8169: fix dmar pte write access is not set error v2: -update commit message -adjust the code according to current kernel code v3: -update title and commit message -split the patch ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
0e3d18359a
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@ -2210,28 +2210,6 @@ static int rtl_set_mac_address(struct net_device *dev, void *p)
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return 0;
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return 0;
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}
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}
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static void rtl_wol_enable_rx(struct rtl8169_private *tp)
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{
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if (tp->mac_version >= RTL_GIGA_MAC_VER_25)
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RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
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AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
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}
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static void rtl_prepare_power_down(struct rtl8169_private *tp)
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{
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if (tp->dash_type != RTL_DASH_NONE)
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return;
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if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
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tp->mac_version == RTL_GIGA_MAC_VER_33)
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rtl_ephy_write(tp, 0x19, 0xff64);
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if (device_may_wakeup(tp_to_dev(tp))) {
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phy_speed_down(tp->phydev, false);
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rtl_wol_enable_rx(tp);
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}
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}
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static void rtl_init_rxcfg(struct rtl8169_private *tp)
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static void rtl_init_rxcfg(struct rtl8169_private *tp)
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{
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{
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switch (tp->mac_version) {
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switch (tp->mac_version) {
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@ -2455,6 +2433,31 @@ static void rtl_enable_rxdvgate(struct rtl8169_private *tp)
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rtl_wait_txrx_fifo_empty(tp);
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rtl_wait_txrx_fifo_empty(tp);
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}
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}
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static void rtl_wol_enable_rx(struct rtl8169_private *tp)
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{
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if (tp->mac_version >= RTL_GIGA_MAC_VER_25)
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RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
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AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
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if (tp->mac_version >= RTL_GIGA_MAC_VER_40)
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rtl_disable_rxdvgate(tp);
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}
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static void rtl_prepare_power_down(struct rtl8169_private *tp)
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{
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if (tp->dash_type != RTL_DASH_NONE)
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return;
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if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
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tp->mac_version == RTL_GIGA_MAC_VER_33)
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rtl_ephy_write(tp, 0x19, 0xff64);
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if (device_may_wakeup(tp_to_dev(tp))) {
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phy_speed_down(tp->phydev, false);
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rtl_wol_enable_rx(tp);
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}
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}
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static void rtl_set_tx_config_registers(struct rtl8169_private *tp)
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static void rtl_set_tx_config_registers(struct rtl8169_private *tp)
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{
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{
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u32 val = TX_DMA_BURST << TxDMAShift |
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u32 val = TX_DMA_BURST << TxDMAShift |
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@ -3872,7 +3875,7 @@ static void rtl8169_tx_clear(struct rtl8169_private *tp)
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netdev_reset_queue(tp->dev);
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netdev_reset_queue(tp->dev);
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}
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}
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static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
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static void rtl8169_cleanup(struct rtl8169_private *tp)
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{
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{
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napi_disable(&tp->napi);
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napi_disable(&tp->napi);
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@ -3884,9 +3887,6 @@ static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
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rtl_rx_close(tp);
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rtl_rx_close(tp);
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if (going_down && tp->dev->wol_enabled)
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goto no_reset;
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switch (tp->mac_version) {
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_28:
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case RTL_GIGA_MAC_VER_28:
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case RTL_GIGA_MAC_VER_31:
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case RTL_GIGA_MAC_VER_31:
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@ -3907,7 +3907,7 @@ static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
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}
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}
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rtl_hw_reset(tp);
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rtl_hw_reset(tp);
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no_reset:
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rtl8169_tx_clear(tp);
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rtl8169_tx_clear(tp);
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rtl8169_init_ring_indexes(tp);
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rtl8169_init_ring_indexes(tp);
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}
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}
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@ -3918,7 +3918,7 @@ static void rtl_reset_work(struct rtl8169_private *tp)
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netif_stop_queue(tp->dev);
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netif_stop_queue(tp->dev);
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rtl8169_cleanup(tp, false);
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rtl8169_cleanup(tp);
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for (i = 0; i < NUM_RX_DESC; i++)
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for (i = 0; i < NUM_RX_DESC; i++)
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rtl8169_mark_to_asic(tp->RxDescArray + i);
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rtl8169_mark_to_asic(tp->RxDescArray + i);
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@ -4605,7 +4605,7 @@ static void rtl8169_down(struct rtl8169_private *tp)
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pci_clear_master(tp->pci_dev);
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pci_clear_master(tp->pci_dev);
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rtl_pci_commit(tp);
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rtl_pci_commit(tp);
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rtl8169_cleanup(tp, true);
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rtl8169_cleanup(tp);
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rtl_disable_exit_l1(tp);
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rtl_disable_exit_l1(tp);
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rtl_prepare_power_down(tp);
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rtl_prepare_power_down(tp);
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}
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}
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