dt-bindings: i2c: qcom,i2c-cci: convert to dtschema
Convert the Qualcomm Camera Control Interface (CCI) I2C controller to DT schema. The original bindings were not complete, so this includes changes: 1. Add address/size-cells. 2. Describe the clocks per variant. 3. Use more descriptive example based on sdm845. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Wolfram Sang
parent
8689b80b22
commit
0a0b80a44c
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@ -1,96 +0,0 @@
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Qualcomm Camera Control Interface (CCI) I2C controller
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PROPERTIES:
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be one of:
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"qcom,msm8916-cci"
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"qcom,msm8974-cci"
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"qcom,msm8996-cci"
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"qcom,sdm845-cci"
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"qcom,sm8250-cci"
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"qcom,sm8450-cci"
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: base address CCI I2C controller and length of memory
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mapped region.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: specifies the CCI I2C interrupt. The format of the
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specifier is defined by the binding document describing
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the node's interrupt parent.
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: a list of phandle, should contain an entry for each
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entries in clock-names.
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- clock-names
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Usage: required
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Value type: <string>
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Definition: a list of clock names, must include "cci" clock.
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- power-domains
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Usage: required for "qcom,msm8996-cci"
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Value type: <prop-encoded-array>
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Definition:
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SUBNODES:
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The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8974,
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msm8996, sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0"
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and "i2c-bus@1".
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PROPERTIES:
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- reg:
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Usage: required
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Value type: <u32>
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Definition: Index of the CCI bus/master
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- clock-frequency:
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Usage: optional
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Value type: <u32>
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Definition: Desired I2C bus clock frequency in Hz, defaults to 100
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kHz if omitted.
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Example:
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cci@a0c000 {
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compatible = "qcom,msm8996-cci";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xa0c000 0x1000>;
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interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
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clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
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<&mmcc CAMSS_TOP_AHB_CLK>,
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<&mmcc CAMSS_CCI_AHB_CLK>,
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<&mmcc CAMSS_CCI_CLK>,
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<&mmcc CAMSS_AHB_CLK>;
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clock-names = "mmss_mmagic_ahb",
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"camss_top_ahb",
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"cci_ahb",
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"cci",
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"camss_ahb";
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i2c-bus@0 {
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reg = <0>;
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c-bus@1 {
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reg = <1>;
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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@ -0,0 +1,242 @@
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Camera Control Interface (CCI) I2C controller
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maintainers:
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- Loic Poulain <loic.poulain@linaro.org>
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- Robert Foss <robert.foss@linaro.org>
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properties:
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compatible:
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enum:
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- qcom,msm8916-cci
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- qcom,msm8974-cci
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- qcom,msm8996-cci
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- qcom,sdm845-cci
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- qcom,sm8250-cci
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- qcom,sm8450-cci
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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clocks:
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minItems: 4
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maxItems: 6
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clock-names:
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minItems: 4
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maxItems: 6
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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reg:
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maxItems: 1
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patternProperties:
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"^i2c-bus@[01]$":
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$ref: /schemas/i2c/i2c-controller.yaml#
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unevaluatedProperties: false
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properties:
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reg:
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maxItems: 1
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clock-frequency:
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default: 100000
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required:
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- compatible
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- clock-names
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- clocks
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- interrupts
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- reg
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8996-cci
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then:
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required:
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- power-domains
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8916-cci
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then:
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properties:
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i2c-bus@1: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8916-cci
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- qcom,msm8996-cci
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then:
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properties:
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: camss_top_ahb
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- const: cci_ahb
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- const: cci
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- const: camss_ahb
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sdm845-cci
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then:
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properties:
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clocks:
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minItems: 6
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clock-names:
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items:
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- const: camnoc_axi
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- const: soc_ahb
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- const: slow_ahb_src
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- const: cpas_ahb
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- const: cci
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- const: cci_src
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8250-cci
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then:
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properties:
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clocks:
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minItems: 5
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maxItems: 5
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clock-names:
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items:
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- const: camnoc_axi
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- const: slow_ahb_src
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- const: cpas_ahb
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- const: cci
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- const: cci_src
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,camcc-sdm845.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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cci@ac4a000 {
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reg = <0x0ac4a000 0x4000>;
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compatible = "qcom,sdm845-cci";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
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power-domains = <&clock_camcc TITAN_TOP_GDSC>;
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clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
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<&clock_camcc CAM_CC_SOC_AHB_CLK>,
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<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
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<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
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<&clock_camcc CAM_CC_CCI_CLK>,
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<&clock_camcc CAM_CC_CCI_CLK_SRC>;
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clock-names = "camnoc_axi",
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"soc_ahb",
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"slow_ahb_src",
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"cpas_ahb",
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"cci",
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"cci_src";
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assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
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<&clock_camcc CAM_CC_CCI_CLK>;
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assigned-clock-rates = <80000000>,
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<37500000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cci0_default &cci1_default>;
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pinctrl-1 = <&cci0_sleep &cci1_sleep>;
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i2c-bus@0 {
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reg = <0>;
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clock-frequency = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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camera@10 {
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compatible = "ovti,ov8856";
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reg = <0x10>;
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reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam0_default>;
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clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
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clock-names = "xvclk";
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clock-frequency = <19200000>;
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dovdd-supply = <&vreg_lvs1a_1p8>;
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avdd-supply = <&cam0_avdd_2v8>;
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dvdd-supply = <&cam0_dvdd_1v2>;
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port {
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ov8856_ep: endpoint {
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link-frequencies = /bits/ 64 <360000000 180000000>;
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&csiphy0_ep>;
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};
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};
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};
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};
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cci_i2c1: i2c-bus@1 {
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reg = <1>;
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clock-frequency = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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camera@60 {
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compatible = "ovti,ov7251";
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reg = <0x60>;
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enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam3_default>;
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clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
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clock-names = "xclk";
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clock-frequency = <24000000>;
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vdddo-supply = <&vreg_lvs1a_1p8>;
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vdda-supply = <&cam3_avdd_2v8>;
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port {
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ov7251_ep: endpoint {
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data-lanes = <0 1>;
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remote-endpoint = <&csiphy3_ep>;
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};
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};
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};
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};
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};
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@ -16879,7 +16879,7 @@ M: Robert Foss <robert.foss@linaro.org>
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L: linux-i2c@vger.kernel.org
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L: linux-arm-msm@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
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F: Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
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F: drivers/i2c/busses/i2c-qcom-cci.c
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QUALCOMM INTERCONNECT BWMON DRIVER
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