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dt-bindings: mailbox: imx-mu: add RST channel 

i.MX MU has a MUR bit which is to reset both the Processor B and the
Processor A sides of the MU module, forcing all control and status
registers to return to their default values (except the BHR bit in the ACR
register and BHRM bit in BCR register), and all internal states to be
cleared.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit is contained in:
Peng Fan 2022-06-15 21:00:08 +08:00 committed by Jassi Brar
parent 6054546618
commit 095730dd4c
1 changed files with 4 additions and 2 deletions
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Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
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@ -72,14 +72,16 @@ properties:
type : Channel type
channel : Channel number
This MU support 4 type of unidirectional channels, each type
has 4 channels. A total of 16 channels. Following types are
This MU support 5 type of unidirectional channels, each type
has 4 channels except RST channel which only has 1 channel.
A total of 17 channels. Following types are
supported:
0 - TX channel with 32bit transmit register and IRQ transmit
acknowledgment support.
1 - RX channel with 32bit receive register and IRQ support
2 - TX doorbell channel. Without own register and no ACK support.
3 - RX doorbell channel.
4 - RST channel
const: 2
clocks: