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acrn-kernel/arch/xtensa/Kconfig.debug

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[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 1 The attached patches provides part 1 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-24 13:01:10 +08:00
menu "Kernel hacking"
source "lib/Kconfig.debug"
xtensa: check TLB sanity on return to userspace - check that user TLB mappings correspond to the current page table; - check that TLB mapping VPN is in the kernel/user address range in accordance with its ASID. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-15 23:34:05 +08:00
config DEBUG_TLB_SANITY
bool "Debug TLB sanity"
depends on DEBUG_KERNEL
help
Enable this to turn on TLB sanity check on each entry to userspace.
This check can spot missing TLB invalidation/wrong PTE permissions/
premature page freeing.
If unsure, say N.
xtensa: add config option to disable linker relaxation The default linker behavior is to optimize identical literal values and remove unnecessary overhead from assembler-generated "longcall" sequences to reduce code size. Provide an option to disable this behavior to improve compile time. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-14 07:16:36 +08:00
config LD_NO_RELAX
bool "Disable linker relaxation"
default n
help
Enable this function to disable link-time optimizations.
The default linker behavior is to combine identical literal
values to reduce code size and remove unnecessary overhead from
assembler-generated 'longcall' sequences.
Enabling this option improves the link time but increases the
code size, and possibly execution time.
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 1 The attached patches provides part 1 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-24 13:01:10 +08:00
xtensa: add s32c1i sanity check Add a brief sanity test of S32C1I functionality. This instruction is needed by the kernel and userland as part of the base ABI (including GCC atomic builtins, certain threading packages, future atomic support in the C++ standard, etc). However, correct operation of this instruction requires some cooperation by hardware external to the processor (such as bus bridge, bus fabric, or memory controller). Minimally exercising this mechanism and reporting explicit status early in the boot process is helpful to chip vendors using the Linux kernel as a benchmark of correctness of hardware. As it turns out, S32C1I is not exercised by the kernel and by uClibc based userland as of early June 2008. This is expected to change soon as both incorporate more recent open source developments. Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-28 15:33:02 +08:00
config S32C1I_SELFTEST
bool "Perform S32C1I instruction self-test at boot"
default y
help
Enable this option to test S32C1I instruction behavior at boot.
Correct operation of this instruction requires some cooperation from hardware
external to the processor (such as bus bridge, bus fabric, or memory controller).
It is easy to make wrong hardware configuration, this test should catch it early.
Say 'N' on stable hardware.
xtensa: add config option to disable linker relaxation The default linker behavior is to optimize identical literal values and remove unnecessary overhead from assembler-generated "longcall" sequences to reduce code size. Provide an option to disable this behavior to improve compile time. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-14 07:16:36 +08:00
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