2015-01-29 00:16:18 +08:00
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/*
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* Copyright 2004 Koninklijke Philips Electronics NV
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*
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* Conversion to platform driver and DT:
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* Copyright 2014 Linaro Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* 14/04/2005 Initial version, colin.king@philips.com
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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static void __iomem *versatile_pci_base;
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static void __iomem *versatile_cfg_base[2];
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#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
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#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
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#define PCI_SELFID (versatile_pci_base + 0xc)
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#define VP_PCI_DEVICE_ID 0x030010ee
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#define VP_PCI_CLASS_ID 0x0b400000
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static u32 pci_slot_ignore;
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static int __init versatile_pci_slot_ignore(char *str)
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{
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int retval;
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int slot;
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while ((retval = get_option(&str, &slot))) {
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if ((slot < 0) || (slot > 31))
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pr_err("Illegal slot value: %d\n", slot);
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else
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pci_slot_ignore |= (1 << slot);
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}
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return 1;
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}
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__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
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static void __iomem *versatile_map_bus(struct pci_bus *bus,
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unsigned int devfn, int offset)
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{
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unsigned int busnr = bus->number;
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if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
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return NULL;
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return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
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}
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static struct pci_ops pci_versatile_ops = {
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.map_bus = versatile_map_bus,
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.read = pci_generic_config_read32,
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.write = pci_generic_config_write,
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};
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static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
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struct list_head *res)
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{
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int err, mem = 1, res_valid = 0;
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struct device_node *np = dev->of_node;
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resource_size_t iobase;
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ACPI and power management updates for v3.20-rc1
- Rework of the core ACPI resources parsing code to fix issues
in it and make using resource offsets more convenient and
consolidation of some resource-handing code in a couple of places
that have grown analagous data structures and code to cover the
the same gap in the core (Jiang Liu, Thomas Gleixner, Lv Zheng).
- ACPI-based IOAPIC hotplug support on top of the resources handling
rework (Jiang Liu, Yinghai Lu).
- ACPICA update to upstream release 20150204 including an interrupt
handling rework that allows drivers to install raw handlers for
ACPI GPEs which then become entirely responsible for the given GPE
and the ACPICA core code won't touch it (Lv Zheng, David E Box,
Octavian Purdila).
- ACPI EC driver rework to fix several concurrency issues and other
problems related to events handling on top of the ACPICA's new
support for raw GPE handlers (Lv Zheng).
- New ACPI driver for AMD SoCs analogous to the LPSS (Low-Power
Subsystem) driver for Intel chips (Ken Xue).
- Two minor fixes of the ACPI LPSS driver (Heikki Krogerus,
Jarkko Nikula).
- Two new blacklist entries for machines (Samsung 730U3E/740U3E and
510R) where the native backlight interface doesn't work correctly
while the ACPI one does (Hans de Goede).
- Rework of the ACPI processor driver's handling of idle states
to make the code more straightforward and less bloated overall
(Rafael J Wysocki).
- Assorted minor fixes related to ACPI and SFI (Andreas Ruprecht,
Andy Shevchenko, Hanjun Guo, Jan Beulich, Rafael J Wysocki,
Yaowei Bai).
- PCI core power management modification to avoid resuming (some)
runtime-suspended devices during system suspend if they are in
the right states already (Rafael J Wysocki).
- New SFI-based cpufreq driver for Intel platforms using SFI
(Srinidhi Kasagar).
- cpufreq core fixes, cleanups and simplifications (Viresh Kumar,
Doug Anderson, Wolfram Sang).
- SkyLake CPU support and other updates for the intel_pstate driver
(Kristen Carlson Accardi, Srinivas Pandruvada).
- cpufreq-dt driver cleanup (Markus Elfring).
- Init fix for the ARM big.LITTLE cpuidle driver (Sudeep Holla).
- Generic power domains core code fixes and cleanups (Ulf Hansson).
- Operating Performance Points (OPP) core code cleanups and kernel
documentation update (Nishanth Menon).
- New dabugfs interface to make the list of PM QoS constraints
available to user space (Nishanth Menon).
- New devfreq driver for Tegra Activity Monitor (Tomeu Vizoso).
- New devfreq class (devfreq_event) to provide raw utilization data
to devfreq governors (Chanwoo Choi).
- Assorted minor fixes and cleanups related to power management
(Andreas Ruprecht, Krzysztof Kozlowski, Rickard Strandqvist,
Pavel Machek, Todd E Brandt, Wonhong Kwon).
- turbostat updates (Len Brown) and cpupower Makefile improvement
(Sriram Raghunathan).
/
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Merge tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"We have a few new features this time, including a new SFI-based
cpufreq driver, a new devfreq driver for Tegra Activity Monitor, a new
devfreq class for providing its governors with raw utilization data
and a new ACPI driver for AMD SoCs.
Still, the majority of changes here are reworks of existing code to
make it more straightforward or to prepare it for implementing new
features on top of it. The primary example is the rework of ACPI
resources handling from Jiang Liu, Thomas Gleixner and Lv Zheng with
support for IOAPIC hotplug implemented on top of it, but there is
quite a number of changes of this kind in the cpufreq core, ACPICA,
ACPI EC driver, ACPI processor driver and the generic power domains
core code too.
The most active developer is Viresh Kumar with his cpufreq changes.
Specifics:
- Rework of the core ACPI resources parsing code to fix issues in it
and make using resource offsets more convenient and consolidation
of some resource-handing code in a couple of places that have grown
analagous data structures and code to cover the the same gap in the
core (Jiang Liu, Thomas Gleixner, Lv Zheng).
- ACPI-based IOAPIC hotplug support on top of the resources handling
rework (Jiang Liu, Yinghai Lu).
- ACPICA update to upstream release 20150204 including an interrupt
handling rework that allows drivers to install raw handlers for
ACPI GPEs which then become entirely responsible for the given GPE
and the ACPICA core code won't touch it (Lv Zheng, David E Box,
Octavian Purdila).
- ACPI EC driver rework to fix several concurrency issues and other
problems related to events handling on top of the ACPICA's new
support for raw GPE handlers (Lv Zheng).
- New ACPI driver for AMD SoCs analogous to the LPSS (Low-Power
Subsystem) driver for Intel chips (Ken Xue).
- Two minor fixes of the ACPI LPSS driver (Heikki Krogerus, Jarkko
Nikula).
- Two new blacklist entries for machines (Samsung 730U3E/740U3E and
510R) where the native backlight interface doesn't work correctly
while the ACPI one does (Hans de Goede).
- Rework of the ACPI processor driver's handling of idle states to
make the code more straightforward and less bloated overall (Rafael
J Wysocki).
- Assorted minor fixes related to ACPI and SFI (Andreas Ruprecht,
Andy Shevchenko, Hanjun Guo, Jan Beulich, Rafael J Wysocki, Yaowei
Bai).
- PCI core power management modification to avoid resuming (some)
runtime-suspended devices during system suspend if they are in the
right states already (Rafael J Wysocki).
- New SFI-based cpufreq driver for Intel platforms using SFI
(Srinidhi Kasagar).
- cpufreq core fixes, cleanups and simplifications (Viresh Kumar,
Doug Anderson, Wolfram Sang).
- SkyLake CPU support and other updates for the intel_pstate driver
(Kristen Carlson Accardi, Srinivas Pandruvada).
- cpufreq-dt driver cleanup (Markus Elfring).
- Init fix for the ARM big.LITTLE cpuidle driver (Sudeep Holla).
- Generic power domains core code fixes and cleanups (Ulf Hansson).
- Operating Performance Points (OPP) core code cleanups and kernel
documentation update (Nishanth Menon).
- New dabugfs interface to make the list of PM QoS constraints
available to user space (Nishanth Menon).
- New devfreq driver for Tegra Activity Monitor (Tomeu Vizoso).
- New devfreq class (devfreq_event) to provide raw utilization data
to devfreq governors (Chanwoo Choi).
- Assorted minor fixes and cleanups related to power management
(Andreas Ruprecht, Krzysztof Kozlowski, Rickard Strandqvist, Pavel
Machek, Todd E Brandt, Wonhong Kwon).
- turbostat updates (Len Brown) and cpupower Makefile improvement
(Sriram Raghunathan)"
* tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (151 commits)
tools/power turbostat: relax dependency on APERF_MSR
tools/power turbostat: relax dependency on invariant TSC
Merge branch 'pci/host-generic' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into acpi-resources
tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS
tools/power turbostat: relax dependency on root permission
ACPI / video: Add disable_native_backlight quirk for Samsung 510R
ACPI / PM: Remove unneeded nested #ifdef
USB / PM: Remove unneeded #ifdef and associated dead code
intel_pstate: provide option to only use intel_pstate with HWP
ACPI / EC: Add GPE reference counting debugging messages
ACPI / EC: Add query flushing support
ACPI / EC: Refine command storm prevention support
ACPI / EC: Add command flushing support.
ACPI / EC: Introduce STARTED/STOPPED flags to replace BLOCKED flag
ACPI: add AMD ACPI2Platform device support for x86 system
ACPI / table: remove duplicate NULL check for the handler of acpi_table_parse()
ACPI / EC: Update revision due to raw handler mode.
ACPI / EC: Reduce ec_poll() by referencing the last register access timestamp.
ACPI / EC: Fix several GPE handling issues by deploying ACPI_GPE_DISPATCH_RAW_HANDLER mode.
ACPICA: Events: Enable APIs to allow interrupt/polling adaptive request based GPE handling model
...
2015-02-11 07:09:41 +08:00
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struct resource_entry *win;
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2015-01-29 00:16:18 +08:00
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err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
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if (err)
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return err;
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2015-02-25 23:15:02 +08:00
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resource_list_for_each_entry(win, res) {
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2015-01-29 00:16:18 +08:00
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struct resource *parent, *res = win->res;
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switch (resource_type(res)) {
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case IORESOURCE_IO:
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parent = &ioport_resource;
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err = pci_remap_iospace(res, iobase);
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if (err) {
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dev_warn(dev, "error %d: failed to map resource %pR\n",
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err, res);
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continue;
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}
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break;
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case IORESOURCE_MEM:
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parent = &iomem_resource;
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res_valid |= !(res->flags & IORESOURCE_PREFETCH);
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writel(res->start >> 28, PCI_IMAP(mem));
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writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
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mem++;
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break;
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case IORESOURCE_BUS:
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default:
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continue;
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}
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err = devm_request_resource(dev, parent, res);
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if (err)
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goto out_release_res;
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}
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if (!res_valid) {
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dev_err(dev, "non-prefetchable memory resource required\n");
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err = -EINVAL;
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goto out_release_res;
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}
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return 0;
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out_release_res:
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pci_free_resource_list(res);
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return err;
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}
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static int versatile_pci_probe(struct platform_device *pdev)
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{
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struct resource *res;
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int ret, i, myslot = -1;
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u32 val;
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void __iomem *local_pci_cfg_base;
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struct pci_bus *bus;
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LIST_HEAD(pci_res);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
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2015-04-03 21:17:05 +08:00
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if (IS_ERR(versatile_pci_base))
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return PTR_ERR(versatile_pci_base);
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2015-01-29 00:16:18 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res);
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2015-04-03 21:17:05 +08:00
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if (IS_ERR(versatile_cfg_base[0]))
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return PTR_ERR(versatile_cfg_base[0]);
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2015-01-29 00:16:18 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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versatile_cfg_base[1] = devm_ioremap_resource(&pdev->dev, res);
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2015-04-03 21:17:05 +08:00
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if (IS_ERR(versatile_cfg_base[1]))
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return PTR_ERR(versatile_cfg_base[1]);
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2015-01-29 00:16:18 +08:00
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ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res);
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if (ret)
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return ret;
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/*
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* We need to discover the PCI core first to configure itself
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* before the main PCI probing is performed
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*/
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for (i = 0; i < 32; i++) {
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if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
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(readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
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myslot = i;
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break;
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}
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}
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if (myslot == -1) {
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dev_err(&pdev->dev, "Cannot find PCI core!\n");
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return -EIO;
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}
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/*
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* Do not to map Versatile FPGA PCI device into memory space
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*/
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pci_slot_ignore |= (1 << myslot);
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dev_info(&pdev->dev, "PCI core found (slot %d)\n", myslot);
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writel(myslot, PCI_SELFID);
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local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
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val = readl(local_pci_cfg_base + PCI_COMMAND);
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val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
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writel(val, local_pci_cfg_base + PCI_COMMAND);
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/*
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* Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
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*/
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writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
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writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
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writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
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/*
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* For many years the kernel and QEMU were symbiotically buggy
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* in that they both assumed the same broken IRQ mapping.
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* QEMU therefore attempts to auto-detect old broken kernels
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* so that they still work on newer QEMU as they did on old
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* QEMU. Since we now use the correct (ie matching-hardware)
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* IRQ mapping we write a definitely different value to a
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* PCI_INTERRUPT_LINE register to tell QEMU that we expect
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* real hardware behaviour and it need not be backwards
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* compatible for us. This write is harmless on real hardware.
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*/
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writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
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pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
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pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
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PCI: generic,versatile: Remove unused pci_sys_data structures
Commit b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource with
global function pointer") removed the struct pci_sys_data dependency from
the ARM pcibios functions that are part of the common ARM PCI arch
back-end, e.g., pcibios_align_resource(), so that struct pci_sys_data has
now become data that is only used internally by the ARM bios32 layer, i.e.,
pci_common_init_dev(), and by host controllers drivers callbacks, e.g.,
pci_sys_data.setup, that rely on the ARM bios32 API to probe.
PCI host controller drivers that do not rely on ARM bios32 calls to probe
do not need to have the pci_bus.sysdata pointer field pointing at a struct
pci_sys_data anymore, therefore it can be removed from the respective
drivers data structures.
Remove the pci_sys_data structures from the host controller drivers that do
not rely on ARM bios32 interface to scan the PCI bus, completing the
pci_sys_data clean-up and removing the related dependency on arch/arm
specific data.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
CC: Will Deacon <will.deacon@arm.com>
CC: Rob Herring <robh@kernel.org>
2015-11-10 02:57:39 +08:00
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|
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bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, NULL, &pci_res);
|
2015-01-29 00:16:18 +08:00
|
|
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if (!bus)
|
|
|
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return -ENOMEM;
|
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|
|
|
|
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pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
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|
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pci_assign_unassigned_bus_resources(bus);
|
PCI: Assign resources before drivers claim devices (pci_scan_root_bus())
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the
devices on it, and called pci_bus_add_devices(), which made the devices
available for drivers to claim them.
Most callers assigned resources to devices after pci_scan_root_bus()
returns, which may be after drivers have claimed the devices. This is
incorrect; the PCI core should not change device resources while a driver
is managing the device.
Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any
resource assignment in the callers.
Note that ARM's pci_common_init_dev() already called pci_bus_add_devices()
after pci_scan_root_bus(), so we only need to remove the first call:
pci_common_init_dev
pcibios_init_hw
pci_scan_root_bus
pci_bus_add_devices # first call
pci_bus_assign_resources
pci_bus_add_devices # second call
[bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(),
return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(),
return early if xtensa platform_pcibios_fixup() fails]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
CC: Matt Turner <mattst88@gmail.com>
CC: David Howells <dhowells@redhat.com>
CC: Tony Luck <tony.luck@intel.com>
CC: Michal Simek <monstr@monstr.eu>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
CC: Sebastian Ott <sebott@linux.vnet.ibm.com>
CC: "David S. Miller" <davem@davemloft.net>
CC: Chris Metcalf <cmetcalf@ezchip.com>
CC: Chris Zankel <chris@zankel.net>
CC: Max Filippov <jcmvbkbc@gmail.com>
CC: Thomas Gleixner <tglx@linutronix.de>
2015-03-16 11:18:56 +08:00
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|
|
pci_bus_add_devices(bus);
|
2015-01-29 00:16:18 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id versatile_pci_of_match[] = {
|
|
|
|
{ .compatible = "arm,versatile-pci", },
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
|
|
|
|
|
|
|
|
static struct platform_driver versatile_pci_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "versatile-pci",
|
|
|
|
.of_match_table = versatile_pci_of_match,
|
|
|
|
},
|
|
|
|
.probe = versatile_pci_probe,
|
|
|
|
};
|
|
|
|
module_platform_driver(versatile_pci_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Versatile PCI driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|