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acrn-kernel/arch/powerpc/sysdev/mv64x60.h

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[POWERPC] Add interrupt support for Marvell mv64x60 chips There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12 08:55:24 +08:00
#ifndef __MV64X60_H__
#define __MV64X60_H__
#include <linux/init.h>
extern void __init mv64x60_init_irq(void);
extern unsigned int mv64x60_get_irq(void);
[POWERPC] Add Marvell mv64x60 PCI bridge support This patch adds PCI bridge support for the Marvell mv64x60 chip. We also provide the ability to read/write the mv64x60 hotswap register via sysfs if the hs_reg_valid property is set in the device tree. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12 08:57:12 +08:00
extern void __init mv64x60_pci_init(void);
[POWERPC] Add interrupt support for Marvell mv64x60 chips There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12 08:55:24 +08:00
#endif /* __MV64X60_H__ */