2019-05-30 07:57:59 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2014-11-28 23:59:15 +08:00
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/*
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* dice_pcm.c - a part of driver for DICE based devices
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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* Copyright (c) 2014 Takashi Sakamoto <o-takashi@sakamocchi.jp>
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*/
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#include "dice.h"
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2018-05-02 18:16:50 +08:00
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static int dice_rate_constraint(struct snd_pcm_hw_params *params,
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struct snd_pcm_hw_rule *rule)
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{
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struct snd_pcm_substream *substream = rule->private;
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struct snd_dice *dice = substream->private_data;
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unsigned int index = substream->pcm->device;
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const struct snd_interval *c =
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hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS);
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struct snd_interval *r =
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hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
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struct snd_interval rates = {
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.min = UINT_MAX, .max = 0, .integer = 1
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};
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unsigned int *pcm_channels;
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enum snd_dice_rate_mode mode;
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unsigned int i, rate;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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pcm_channels = dice->tx_pcm_chs[index];
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else
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pcm_channels = dice->rx_pcm_chs[index];
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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rate = snd_dice_rates[i];
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if (snd_dice_stream_get_rate_mode(dice, rate, &mode) < 0)
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continue;
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if (!snd_interval_test(c, pcm_channels[mode]))
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continue;
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rates.min = min(rates.min, rate);
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rates.max = max(rates.max, rate);
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}
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return snd_interval_refine(r, &rates);
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}
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static int dice_channels_constraint(struct snd_pcm_hw_params *params,
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struct snd_pcm_hw_rule *rule)
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{
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struct snd_pcm_substream *substream = rule->private;
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struct snd_dice *dice = substream->private_data;
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unsigned int index = substream->pcm->device;
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const struct snd_interval *r =
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hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
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struct snd_interval *c =
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hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
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struct snd_interval channels = {
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.min = UINT_MAX, .max = 0, .integer = 1
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};
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unsigned int *pcm_channels;
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enum snd_dice_rate_mode mode;
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unsigned int i, rate;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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pcm_channels = dice->tx_pcm_chs[index];
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else
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pcm_channels = dice->rx_pcm_chs[index];
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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rate = snd_dice_rates[i];
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if (snd_dice_stream_get_rate_mode(dice, rate, &mode) < 0)
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continue;
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if (!snd_interval_test(r, rate))
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continue;
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channels.min = min(channels.min, pcm_channels[mode]);
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channels.max = max(channels.max, pcm_channels[mode]);
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}
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return snd_interval_refine(c, &channels);
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}
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2016-02-08 21:54:15 +08:00
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static int limit_channels_and_rates(struct snd_dice *dice,
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struct snd_pcm_runtime *runtime,
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2016-03-07 21:35:44 +08:00
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enum amdtp_stream_direction dir,
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2018-05-02 18:16:50 +08:00
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unsigned int index)
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2014-11-28 23:59:15 +08:00
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{
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2014-11-28 23:59:18 +08:00
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struct snd_pcm_hardware *hw = &runtime->hw;
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2018-05-02 18:16:50 +08:00
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unsigned int *pcm_channels;
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unsigned int i;
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if (dir == AMDTP_IN_STREAM)
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pcm_channels = dice->tx_pcm_chs[index];
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else
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pcm_channels = dice->rx_pcm_chs[index];
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hw->channels_min = UINT_MAX;
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hw->channels_max = 0;
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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enum snd_dice_rate_mode mode;
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unsigned int rate, channels;
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rate = snd_dice_rates[i];
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if (snd_dice_stream_get_rate_mode(dice, rate, &mode) < 0)
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continue;
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hw->rates |= snd_pcm_rate_to_rate_bit(rate);
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channels = pcm_channels[mode];
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if (channels == 0)
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continue;
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hw->channels_min = min(hw->channels_min, channels);
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hw->channels_max = max(hw->channels_max, channels);
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2016-02-08 21:54:15 +08:00
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}
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2014-11-28 23:59:18 +08:00
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2014-11-28 23:59:15 +08:00
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snd_pcm_limit_hw_rates(runtime);
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2016-02-08 21:54:15 +08:00
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return 0;
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2014-11-28 23:59:18 +08:00
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}
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2014-11-28 23:59:15 +08:00
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2014-11-28 23:59:18 +08:00
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static int init_hw_info(struct snd_dice *dice,
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struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_pcm_hardware *hw = &runtime->hw;
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2018-05-02 18:16:50 +08:00
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unsigned int index = substream->pcm->device;
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2016-03-07 21:35:44 +08:00
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enum amdtp_stream_direction dir;
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2014-12-08 23:10:38 +08:00
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struct amdtp_stream *stream;
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2014-11-28 23:59:18 +08:00
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int err;
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2014-12-08 23:10:38 +08:00
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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2015-09-19 10:22:01 +08:00
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hw->formats = AM824_IN_PCM_FORMAT_BITS;
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2016-03-07 21:35:44 +08:00
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dir = AMDTP_IN_STREAM;
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2018-05-02 18:16:50 +08:00
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stream = &dice->tx_stream[index];
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2014-12-08 23:10:38 +08:00
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} else {
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2015-09-19 10:22:01 +08:00
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hw->formats = AM824_OUT_PCM_FORMAT_BITS;
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2016-03-07 21:35:44 +08:00
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dir = AMDTP_OUT_STREAM;
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2018-05-02 18:16:50 +08:00
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stream = &dice->rx_stream[index];
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2014-12-08 23:10:38 +08:00
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}
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2018-05-02 18:16:50 +08:00
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err = limit_channels_and_rates(dice, substream->runtime, dir,
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index);
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2016-03-07 21:35:44 +08:00
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if (err < 0)
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return err;
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2018-05-02 18:16:50 +08:00
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err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
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dice_rate_constraint, substream,
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SNDRV_PCM_HW_PARAM_CHANNELS, -1);
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if (err < 0)
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return err;
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err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
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dice_channels_constraint, substream,
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SNDRV_PCM_HW_PARAM_RATE, -1);
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2014-11-28 23:59:15 +08:00
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if (err < 0)
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2016-02-08 21:54:15 +08:00
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return err;
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2014-11-28 23:59:15 +08:00
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2016-02-08 21:54:15 +08:00
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return amdtp_am824_add_pcm_hw_constraints(stream, runtime);
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2014-11-28 23:59:18 +08:00
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}
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2014-11-28 23:59:15 +08:00
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2014-11-28 23:59:18 +08:00
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static int pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_dice *dice = substream->private_data;
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2019-10-07 19:05:28 +08:00
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struct amdtp_domain *d = &dice->domain;
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2018-05-02 18:16:50 +08:00
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unsigned int source;
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bool internal;
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2014-11-28 23:59:18 +08:00
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int err;
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2014-11-28 23:59:15 +08:00
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2014-11-28 23:59:18 +08:00
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err = snd_dice_stream_lock_try(dice);
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if (err < 0)
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2019-10-07 19:05:28 +08:00
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return err;
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2014-11-28 23:59:18 +08:00
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err = init_hw_info(dice, substream);
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if (err < 0)
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goto err_locked;
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2014-12-08 23:10:37 +08:00
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2018-05-02 18:16:50 +08:00
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err = snd_dice_transaction_get_clock_source(dice, &source);
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if (err < 0)
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goto err_locked;
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switch (source) {
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case CLOCK_SOURCE_AES1:
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case CLOCK_SOURCE_AES2:
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case CLOCK_SOURCE_AES3:
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case CLOCK_SOURCE_AES4:
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case CLOCK_SOURCE_AES_ANY:
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case CLOCK_SOURCE_ADAT:
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case CLOCK_SOURCE_TDIF:
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case CLOCK_SOURCE_WC:
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internal = false;
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break;
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default:
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internal = true;
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break;
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}
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2019-10-07 19:05:28 +08:00
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mutex_lock(&dice->mutex);
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// When source of clock is not internal or any stream is reserved for
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// transmission of PCM frames, the available sampling rate is limited
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// at current one.
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2018-05-02 18:16:50 +08:00
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if (!internal ||
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2019-10-07 19:05:28 +08:00
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(dice->substreams_counter > 0 && d->events_per_period > 0)) {
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unsigned int frames_per_period = d->events_per_period;
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2019-10-17 23:54:17 +08:00
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unsigned int frames_per_buffer = d->events_per_buffer;
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2018-05-02 18:16:50 +08:00
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unsigned int rate;
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err = snd_dice_transaction_get_rate(dice, &rate);
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2019-10-07 19:05:28 +08:00
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if (err < 0) {
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mutex_unlock(&dice->mutex);
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2018-05-02 18:16:50 +08:00
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goto err_locked;
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2019-10-07 19:05:28 +08:00
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}
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2018-05-02 18:16:50 +08:00
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substream->runtime->hw.rate_min = rate;
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substream->runtime->hw.rate_max = rate;
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2019-10-07 19:05:28 +08:00
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if (frames_per_period > 0) {
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// For double_pcm_frame quirk.
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2021-05-18 09:25:10 +08:00
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if (rate > 96000 && !dice->disable_double_pcm_frames) {
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2019-10-07 19:05:28 +08:00
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frames_per_period *= 2;
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2019-10-17 23:54:17 +08:00
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frames_per_buffer *= 2;
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}
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2019-10-07 19:05:28 +08:00
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err = snd_pcm_hw_constraint_minmax(substream->runtime,
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SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
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frames_per_period, frames_per_period);
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if (err < 0) {
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mutex_unlock(&dice->mutex);
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goto err_locked;
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}
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2019-10-17 23:54:17 +08:00
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err = snd_pcm_hw_constraint_minmax(substream->runtime,
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SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
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frames_per_buffer, frames_per_buffer);
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if (err < 0) {
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mutex_unlock(&dice->mutex);
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goto err_locked;
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}
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2019-10-07 19:05:28 +08:00
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}
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2018-05-02 18:16:50 +08:00
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}
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2019-10-07 19:05:28 +08:00
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mutex_unlock(&dice->mutex);
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2014-12-08 23:10:37 +08:00
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snd_pcm_set_sync(substream);
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2019-10-07 19:05:28 +08:00
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return 0;
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2014-11-28 23:59:18 +08:00
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err_locked:
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2014-11-28 23:59:15 +08:00
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snd_dice_stream_lock_release(dice);
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return err;
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}
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static int pcm_close(struct snd_pcm_substream *substream)
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{
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struct snd_dice *dice = substream->private_data;
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snd_dice_stream_lock_release(dice);
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return 0;
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}
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2019-06-11 21:21:18 +08:00
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static int pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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2014-12-08 23:10:38 +08:00
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{
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struct snd_dice *dice = substream->private_data;
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2019-12-09 17:48:41 +08:00
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int err = 0;
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2014-12-08 23:10:38 +08:00
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2022-09-26 21:55:51 +08:00
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if (substream->runtime->state == SNDRV_PCM_STATE_OPEN) {
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2019-06-11 21:21:16 +08:00
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unsigned int rate = params_rate(hw_params);
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2019-10-07 19:05:20 +08:00
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unsigned int events_per_period = params_period_size(hw_params);
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2019-10-17 23:54:17 +08:00
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unsigned int events_per_buffer = params_buffer_size(hw_params);
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2019-06-11 21:21:16 +08:00
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2014-12-08 23:10:38 +08:00
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mutex_lock(&dice->mutex);
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2019-10-07 19:05:20 +08:00
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// For double_pcm_frame quirk.
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2021-05-18 09:25:10 +08:00
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if (rate > 96000 && !dice->disable_double_pcm_frames) {
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2019-10-07 19:05:20 +08:00
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events_per_period /= 2;
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2019-10-17 23:54:17 +08:00
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events_per_buffer /= 2;
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}
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2019-10-07 19:05:20 +08:00
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err = snd_dice_stream_reserve_duplex(dice, rate,
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2019-10-17 23:54:17 +08:00
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events_per_period, events_per_buffer);
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2019-06-11 21:21:16 +08:00
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if (err >= 0)
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++dice->substreams_counter;
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2014-12-08 23:10:38 +08:00
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mutex_unlock(&dice->mutex);
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}
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2019-06-11 21:21:16 +08:00
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return err;
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2014-12-08 23:10:38 +08:00
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}
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2019-06-11 21:21:18 +08:00
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static int pcm_hw_free(struct snd_pcm_substream *substream)
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2014-11-28 23:59:15 +08:00
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{
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struct snd_dice *dice = substream->private_data;
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mutex_lock(&dice->mutex);
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2014-12-08 23:10:38 +08:00
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2022-09-26 21:55:51 +08:00
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if (substream->runtime->state != SNDRV_PCM_STATE_OPEN)
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2019-06-11 21:21:16 +08:00
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--dice->substreams_counter;
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2014-12-08 23:10:38 +08:00
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2014-12-08 23:10:36 +08:00
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snd_dice_stream_stop_duplex(dice);
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2014-12-08 23:10:38 +08:00
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2014-11-28 23:59:15 +08:00
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mutex_unlock(&dice->mutex);
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|
|
2019-12-09 17:48:41 +08:00
|
|
|
return 0;
|
2014-11-28 23:59:15 +08:00
|
|
|
}
|
|
|
|
|
2014-12-08 23:10:38 +08:00
|
|
|
static int capture_prepare(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->tx_stream[substream->pcm->device];
|
2014-12-08 23:10:38 +08:00
|
|
|
int err;
|
|
|
|
|
|
|
|
mutex_lock(&dice->mutex);
|
2019-06-11 21:21:16 +08:00
|
|
|
err = snd_dice_stream_start_duplex(dice);
|
2014-12-08 23:10:38 +08:00
|
|
|
mutex_unlock(&dice->mutex);
|
|
|
|
if (err >= 0)
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_prepare(stream);
|
2014-12-08 23:10:38 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2014-11-28 23:59:15 +08:00
|
|
|
static int playback_prepare(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->rx_stream[substream->pcm->device];
|
2014-11-28 23:59:15 +08:00
|
|
|
int err;
|
|
|
|
|
|
|
|
mutex_lock(&dice->mutex);
|
2019-06-11 21:21:16 +08:00
|
|
|
err = snd_dice_stream_start_duplex(dice);
|
2014-11-28 23:59:15 +08:00
|
|
|
mutex_unlock(&dice->mutex);
|
2014-12-08 23:10:35 +08:00
|
|
|
if (err >= 0)
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_prepare(stream);
|
2014-11-28 23:59:15 +08:00
|
|
|
|
2014-12-08 23:10:35 +08:00
|
|
|
return err;
|
2014-11-28 23:59:15 +08:00
|
|
|
}
|
|
|
|
|
2014-12-08 23:10:38 +08:00
|
|
|
static int capture_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->tx_stream[substream->pcm->device];
|
2014-12-08 23:10:38 +08:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SNDRV_PCM_TRIGGER_START:
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_trigger(stream, substream);
|
2014-12-08 23:10:38 +08:00
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_trigger(stream, NULL);
|
2014-12-08 23:10:38 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2014-11-28 23:59:15 +08:00
|
|
|
static int playback_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->rx_stream[substream->pcm->device];
|
2014-11-28 23:59:15 +08:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SNDRV_PCM_TRIGGER_START:
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_trigger(stream, substream);
|
2014-11-28 23:59:15 +08:00
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
ALSA: dice: have two sets of isochronous resources/streams
Currently ALSA dice driver handles a pair of isochronous resources for
IEC 61883-1/6 packet streaming. While, according to some documents about
ASICs named as 'Dice', several isochronous streams are available.
Here, I start to describe ASICs produced under 'Dice' name.
* Dice II (designed by wavefront semiconductor, including TCAT's IP)
* STD (with limited functionality of DTCP)
* CP (with full functionality of DTCP)
* TCD2210/2210-E (so-called 'Dice Mini')
* TCD2220/2220-E (so-called 'Dice Jr.')
* TCD3070-CH (so-called 'Dice III')
Some documents are public and we can see hardware design of them. We can
find some articles about hardware internal register definitions
(not registers exported to IEEE 1394 bus).
* DICE II User Guide
* http://www.tctechnologies.tc/archive/downloads/dice_ii_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 6.1: AVS Audio Receiver Memory Map
* ARX1-ARX4
* 6.2 AVS Audio Transmitters
* Table 6.2: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* TCD22xx User Guide
* http://www.tctechnologies.tc/downloads/tcd22xx_user_guide.pdf
* 6.1 AVS Audio Receivers
* Table 66: AVS Audio Receiver Memory Map
* ARX1, ARX2
* 6/2 AVS Audio Transmitters
* Table 67: AVS Audio Transmitter Memory Map
* ATX1, ATX2
* DICE III
* http://www.tctechnologies.tc/downloads/TCD3070-CH.pdf
* Dual stream 63 channel transmitter/receiver
For Dice II and TCD22xx series, maximum 16 data channels are transferred in
an AMDTP packet, while for Dice III, maximum 32 data channels are
transferred.
According to the design of the series of these ASICs, this commit allows
this driver to handle additional set of isochronous resources. For
practical reason, two pair of isochronous resources are added. As of this
commit, this driver still use a pair of the first isochronous resources.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-03-07 21:35:42 +08:00
|
|
|
amdtp_stream_pcm_trigger(stream, NULL);
|
2014-11-28 23:59:15 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-12-08 23:10:38 +08:00
|
|
|
static snd_pcm_uframes_t capture_pointer(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->tx_stream[substream->pcm->device];
|
2014-12-08 23:10:38 +08:00
|
|
|
|
2019-10-18 14:19:07 +08:00
|
|
|
return amdtp_domain_stream_pcm_pointer(&dice->domain, stream);
|
2014-12-08 23:10:38 +08:00
|
|
|
}
|
2014-11-28 23:59:15 +08:00
|
|
|
static snd_pcm_uframes_t playback_pointer(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
2016-03-07 21:35:44 +08:00
|
|
|
struct amdtp_stream *stream = &dice->rx_stream[substream->pcm->device];
|
2014-11-28 23:59:15 +08:00
|
|
|
|
2019-10-18 14:19:07 +08:00
|
|
|
return amdtp_domain_stream_pcm_pointer(&dice->domain, stream);
|
2014-11-28 23:59:15 +08:00
|
|
|
}
|
|
|
|
|
2017-06-07 08:38:05 +08:00
|
|
|
static int capture_ack(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
|
|
|
struct amdtp_stream *stream = &dice->tx_stream[substream->pcm->device];
|
|
|
|
|
2019-10-18 14:19:08 +08:00
|
|
|
return amdtp_domain_stream_pcm_ack(&dice->domain, stream);
|
2017-06-07 08:38:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int playback_ack(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_dice *dice = substream->private_data;
|
|
|
|
struct amdtp_stream *stream = &dice->rx_stream[substream->pcm->device];
|
|
|
|
|
2019-10-18 14:19:08 +08:00
|
|
|
return amdtp_domain_stream_pcm_ack(&dice->domain, stream);
|
2017-06-07 08:38:05 +08:00
|
|
|
}
|
|
|
|
|
2014-11-28 23:59:15 +08:00
|
|
|
int snd_dice_create_pcm(struct snd_dice *dice)
|
|
|
|
{
|
2016-09-02 06:13:11 +08:00
|
|
|
static const struct snd_pcm_ops capture_ops = {
|
2014-12-08 23:10:38 +08:00
|
|
|
.open = pcm_open,
|
|
|
|
.close = pcm_close,
|
2019-06-11 21:21:18 +08:00
|
|
|
.hw_params = pcm_hw_params,
|
|
|
|
.hw_free = pcm_hw_free,
|
2014-12-08 23:10:38 +08:00
|
|
|
.prepare = capture_prepare,
|
|
|
|
.trigger = capture_trigger,
|
|
|
|
.pointer = capture_pointer,
|
2017-06-07 08:38:05 +08:00
|
|
|
.ack = capture_ack,
|
2014-12-08 23:10:38 +08:00
|
|
|
};
|
2016-09-02 06:13:11 +08:00
|
|
|
static const struct snd_pcm_ops playback_ops = {
|
2014-11-28 23:59:15 +08:00
|
|
|
.open = pcm_open,
|
|
|
|
.close = pcm_close,
|
2019-06-11 21:21:18 +08:00
|
|
|
.hw_params = pcm_hw_params,
|
|
|
|
.hw_free = pcm_hw_free,
|
2014-11-28 23:59:15 +08:00
|
|
|
.prepare = playback_prepare,
|
|
|
|
.trigger = playback_trigger,
|
|
|
|
.pointer = playback_pointer,
|
2017-06-07 08:38:05 +08:00
|
|
|
.ack = playback_ack,
|
2014-11-28 23:59:15 +08:00
|
|
|
};
|
|
|
|
struct snd_pcm *pcm;
|
ALSA: dice: remove local frag of force_two_pcms
At present, to add PCM substreams for each of available tx/rx streams,
this driver uses a condition based on model-name. This is not enough
to support unknown models.
In former commits, this driver gains cache of stream formats. For models
which support protocol extension, all of available steam formats are
cached. For known models, hard-coded stream formats are used to generate
the cache. For unknown models, stream formats at current mode of sampling
transmission frequency is cached.
Anyway, at least, the cached formats are used to expose constrains of PCM
substreams for userspace applications. Thus, The cached data can be also
used to add PCM substreams themselves, instead of the name-based
conditions.
This commit obsoletes local frag of force_two_pcms.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-05-02 18:16:51 +08:00
|
|
|
unsigned int capture, playback;
|
|
|
|
int i, j;
|
2014-11-28 23:59:15 +08:00
|
|
|
int err;
|
|
|
|
|
2016-03-07 21:35:44 +08:00
|
|
|
for (i = 0; i < MAX_STREAMS; i++) {
|
|
|
|
capture = playback = 0;
|
ALSA: dice: remove local frag of force_two_pcms
At present, to add PCM substreams for each of available tx/rx streams,
this driver uses a condition based on model-name. This is not enough
to support unknown models.
In former commits, this driver gains cache of stream formats. For models
which support protocol extension, all of available steam formats are
cached. For known models, hard-coded stream formats are used to generate
the cache. For unknown models, stream formats at current mode of sampling
transmission frequency is cached.
Anyway, at least, the cached formats are used to expose constrains of PCM
substreams for userspace applications. Thus, The cached data can be also
used to add PCM substreams themselves, instead of the name-based
conditions.
This commit obsoletes local frag of force_two_pcms.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-05-02 18:16:51 +08:00
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for (j = 0; j < SND_DICE_RATE_MODE_COUNT; ++j) {
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if (dice->tx_pcm_chs[i][j] > 0)
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capture = 1;
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if (dice->rx_pcm_chs[i][j] > 0)
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playback = 1;
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}
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2016-03-07 21:35:44 +08:00
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err = snd_pcm_new(dice->card, "DICE", i, playback, capture,
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&pcm);
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if (err < 0)
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return err;
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pcm->private_data = dice;
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strcpy(pcm->name, dice->card->shortname);
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if (capture > 0)
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snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
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&capture_ops);
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if (playback > 0)
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snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
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&playback_ops);
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2019-11-05 23:18:42 +08:00
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2019-12-09 17:48:41 +08:00
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snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC,
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NULL, 0, 0);
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2016-03-07 21:35:44 +08:00
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}
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2014-11-28 23:59:15 +08:00
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return 0;
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}
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