2022-05-31 18:04:11 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Author: Huacai Chen <chenhuacai@loongson.cn>
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*
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* Derived from MIPS:
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* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
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* Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2004 Thiemo Seufer
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/task.h>
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#include <linux/sched/task_stack.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/export.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/personality.h>
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#include <linux/sys.h>
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#include <linux/completion.h>
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#include <linux/kallsyms.h>
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#include <linux/random.h>
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#include <linux/prctl.h>
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#include <linux/nmi.h>
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#include <asm/asm.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/elf.h>
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#include <asm/fpu.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/irq_regs.h>
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#include <asm/loongarch.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/reg.h>
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2022-08-06 16:10:02 +08:00
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#include <asm/unwind.h>
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2022-05-31 18:04:11 +08:00
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#include <asm/vdso.h>
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/*
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* Idle related variables and functions
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*/
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unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
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EXPORT_SYMBOL(boot_option_idle_override);
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2022-05-31 18:04:12 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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void arch_cpu_idle_dead(void)
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{
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play_dead();
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}
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#endif
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2022-05-31 18:04:11 +08:00
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asmlinkage void ret_from_fork(void);
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asmlinkage void ret_from_kernel_thread(void);
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void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
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{
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unsigned long crmd;
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unsigned long prmd;
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unsigned long euen;
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/* New thread loses kernel privileges. */
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crmd = regs->csr_crmd & ~(PLV_MASK);
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crmd |= PLV_USER;
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regs->csr_crmd = crmd;
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prmd = regs->csr_prmd & ~(PLV_MASK);
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prmd |= PLV_USER;
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regs->csr_prmd = prmd;
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euen = regs->csr_euen & ~(CSR_EUEN_FPEN);
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regs->csr_euen = euen;
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lose_fpu(0);
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LoongArch: Fix and simplify fcsr initialization on execve()
commit c2396651309eba291c15e32db8fbe44c738b5921 upstream.
There has been a lingering bug in LoongArch Linux systems causing some
GCC tests to intermittently fail (see Closes link). I've made a minimal
reproducer:
zsh% cat measure.s
.align 4
.globl _start
_start:
movfcsr2gr $a0, $fcsr0
bstrpick.w $a0, $a0, 16, 16
beqz $a0, .ok
break 0
.ok:
li.w $a7, 93
syscall 0
zsh% cc mesaure.s -o measure -nostdlib
zsh% echo $((1.0/3))
0.33333333333333331
zsh% while ./measure; do ; done
This while loop should not stop as POSIX is clear that execve must set
fenv to the default, where FCSR should be zero. But in fact it will
just stop after running for a while (normally less than 30 seconds).
Note that "$((1.0/3))" is needed to reproduce this issue because it
raises FE_INVALID and makes fcsr0 non-zero.
The problem is we are currently relying on SET_PERSONALITY2() to reset
current->thread.fpu.fcsr. But SET_PERSONALITY2() is executed before
start_thread which calls lose_fpu(0). We can see if kernel preempt is
enabled, we may switch to another thread after SET_PERSONALITY2() but
before lose_fpu(0). Then bad thing happens: during the thread switch
the value of the fcsr0 register is stored into current->thread.fpu.fcsr,
making it dirty again.
The issue can be fixed by setting current->thread.fpu.fcsr after
lose_fpu(0) because lose_fpu() clears TIF_USEDFPU, then the thread
switch won't touch current->thread.fpu.fcsr.
The only other architecture setting FCSR in SET_PERSONALITY2() is MIPS.
I've ran a similar test on MIPS with mainline kernel and it turns out
MIPS is buggy, too. Anyway MIPS do this for supporting different FP
flavors (NaN encodings, etc.) which do not exist on LoongArch. So for
LoongArch, we can simply remove the current->thread.fpu.fcsr setting
from SET_PERSONALITY2() and do it in start_thread(), after lose_fpu(0).
The while loop failing with the mainline kernel has survived one hour
after this change on LoongArch.
Fixes: 803b0fc5c3f2baa ("LoongArch: Add process management")
Closes: https://github.com/loongson-community/discussions/issues/7
Link: https://lore.kernel.org/linux-mips/7a6aa1bbdbbe2e63ae96ff163fab0349f58f1b9e.camel@xry111.site/
Cc: stable@vger.kernel.org
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-01-17 12:43:08 +08:00
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current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
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2022-05-31 18:04:11 +08:00
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clear_thread_flag(TIF_LSX_CTX_LIVE);
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clear_thread_flag(TIF_LASX_CTX_LIVE);
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clear_used_math();
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regs->csr_era = pc;
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regs->regs[3] = sp;
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}
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void exit_thread(struct task_struct *tsk)
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{
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}
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int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
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{
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/*
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* Save any process state which is live in hardware registers to the
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* parent context prior to duplication. This prevents the new child
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* state becoming stale if the parent is preempted before copy_thread()
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* gets a chance to save the parent's live hardware registers to the
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* child context.
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*/
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preempt_disable();
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if (is_fpu_owner())
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save_fp(current);
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preempt_enable();
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if (used_math())
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memcpy(dst, src, sizeof(struct task_struct));
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else
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memcpy(dst, src, offsetof(struct task_struct, thread.fpu.fpr));
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return 0;
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}
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/*
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* Copy architecture-specific thread state
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*/
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2022-06-05 16:20:03 +08:00
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int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
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2022-05-31 18:04:11 +08:00
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{
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unsigned long childksp;
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2022-06-05 16:20:03 +08:00
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unsigned long tls = args->tls;
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unsigned long usp = args->stack;
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unsigned long clone_flags = args->flags;
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2022-05-31 18:04:11 +08:00
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struct pt_regs *childregs, *regs = current_pt_regs();
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2022-10-29 16:29:31 +08:00
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childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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2022-05-31 18:04:11 +08:00
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/* set up new TSS. */
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childregs = (struct pt_regs *) childksp - 1;
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/* Put the stack after the struct pt_regs. */
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childksp = (unsigned long) childregs;
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2022-08-06 16:10:04 +08:00
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p->thread.sched_cfa = 0;
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2022-05-31 18:04:11 +08:00
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p->thread.csr_euen = 0;
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p->thread.csr_crmd = csr_read32(LOONGARCH_CSR_CRMD);
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p->thread.csr_prmd = csr_read32(LOONGARCH_CSR_PRMD);
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p->thread.csr_ecfg = csr_read32(LOONGARCH_CSR_ECFG);
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2022-06-05 16:20:03 +08:00
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if (unlikely(args->fn)) {
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2022-05-31 18:04:11 +08:00
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/* kernel thread */
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p->thread.reg03 = childksp;
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2022-06-05 16:20:03 +08:00
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p->thread.reg23 = (unsigned long)args->fn;
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p->thread.reg24 = (unsigned long)args->fn_arg;
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p->thread.reg01 = (unsigned long)ret_from_kernel_thread;
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2022-08-06 16:10:04 +08:00
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p->thread.sched_ra = (unsigned long)ret_from_kernel_thread;
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2022-05-31 18:04:11 +08:00
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memset(childregs, 0, sizeof(struct pt_regs));
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childregs->csr_euen = p->thread.csr_euen;
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childregs->csr_crmd = p->thread.csr_crmd;
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childregs->csr_prmd = p->thread.csr_prmd;
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childregs->csr_ecfg = p->thread.csr_ecfg;
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2022-11-21 19:02:57 +08:00
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goto out;
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2022-05-31 18:04:11 +08:00
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}
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/* user thread */
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*childregs = *regs;
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childregs->regs[4] = 0; /* Child gets zero as return value */
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if (usp)
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childregs->regs[3] = usp;
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p->thread.reg03 = (unsigned long) childregs;
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p->thread.reg01 = (unsigned long) ret_from_fork;
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2022-08-06 16:10:04 +08:00
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p->thread.sched_ra = (unsigned long) ret_from_fork;
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2022-05-31 18:04:11 +08:00
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/*
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* New tasks lose permission to use the fpu. This accelerates context
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* switching for most programs since they don't use the fpu.
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*/
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childregs->csr_euen = 0;
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2022-11-21 19:02:57 +08:00
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if (clone_flags & CLONE_SETTLS)
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childregs->regs[2] = tls;
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out:
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2022-05-31 18:04:11 +08:00
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clear_tsk_thread_flag(p, TIF_USEDFPU);
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clear_tsk_thread_flag(p, TIF_USEDSIMD);
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clear_tsk_thread_flag(p, TIF_LSX_CTX_LIVE);
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clear_tsk_thread_flag(p, TIF_LASX_CTX_LIVE);
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return 0;
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}
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unsigned long __get_wchan(struct task_struct *task)
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{
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2023-01-17 11:42:16 +08:00
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unsigned long pc = 0;
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2022-08-06 16:10:04 +08:00
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struct unwind_state state;
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if (!try_get_task_stack(task))
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return 0;
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2023-01-17 11:42:16 +08:00
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for (unwind_start(&state, task, NULL);
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!unwind_done(&state); unwind_next_frame(&state)) {
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2022-08-06 16:10:04 +08:00
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pc = unwind_get_return_address(&state);
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if (!pc)
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break;
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if (in_sched_functions(pc))
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continue;
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break;
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}
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put_task_stack(task);
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return pc;
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2022-05-31 18:04:11 +08:00
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}
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2022-08-06 16:10:02 +08:00
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bool in_irq_stack(unsigned long stack, struct stack_info *info)
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{
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unsigned long nextsp;
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unsigned long begin = (unsigned long)this_cpu_read(irq_stack);
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unsigned long end = begin + IRQ_STACK_START;
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if (stack < begin || stack >= end)
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return false;
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nextsp = *(unsigned long *)end;
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if (nextsp & (SZREG - 1))
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return false;
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info->begin = begin;
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info->end = end;
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info->next_sp = nextsp;
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info->type = STACK_TYPE_IRQ;
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return true;
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}
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bool in_task_stack(unsigned long stack, struct task_struct *task,
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struct stack_info *info)
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{
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unsigned long begin = (unsigned long)task_stack_page(task);
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2022-10-29 16:29:31 +08:00
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unsigned long end = begin + THREAD_SIZE;
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2022-08-06 16:10:02 +08:00
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if (stack < begin || stack >= end)
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return false;
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info->begin = begin;
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info->end = end;
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info->next_sp = 0;
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info->type = STACK_TYPE_TASK;
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return true;
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}
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int get_stack_info(unsigned long stack, struct task_struct *task,
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struct stack_info *info)
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{
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task = task ? : current;
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if (!stack || stack & (SZREG - 1))
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goto unknown;
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if (in_task_stack(stack, task, info))
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return 0;
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if (task != current)
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goto unknown;
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if (in_irq_stack(stack, info))
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return 0;
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unknown:
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info->type = STACK_TYPE_UNKNOWN;
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return -EINVAL;
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}
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2022-05-31 18:04:11 +08:00
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unsigned long stack_top(void)
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{
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unsigned long top = TASK_SIZE & PAGE_MASK;
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/* Space for the VDSO & data page */
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top -= PAGE_ALIGN(current->thread.vdso->size);
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top -= PAGE_SIZE;
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/* Space to randomize the VDSO base */
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if (current->flags & PF_RANDOMIZE)
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top -= VDSO_RANDOMIZE_SIZE;
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return top;
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}
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/*
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* Don't forget that the stack pointer must be aligned on a 8 bytes
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* boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
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*/
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unsigned long arch_align_stack(unsigned long sp)
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{
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if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
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2022-10-10 10:44:02 +08:00
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sp -= get_random_u32_below(PAGE_SIZE);
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2022-05-31 18:04:11 +08:00
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return sp & STACK_ALIGN;
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}
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static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
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static struct cpumask backtrace_csd_busy;
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static void handle_backtrace(void *info)
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{
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nmi_cpu_backtrace(get_irq_regs());
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cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
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}
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static void raise_backtrace(cpumask_t *mask)
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{
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call_single_data_t *csd;
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int cpu;
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|
|
|
|
|
for_each_cpu(cpu, mask) {
|
|
|
|
/*
|
|
|
|
* If we previously sent an IPI to the target CPU & it hasn't
|
|
|
|
* cleared its bit in the busy cpumask then it didn't handle
|
|
|
|
* our previous IPI & it's not safe for us to reuse the
|
|
|
|
* call_single_data_t.
|
|
|
|
*/
|
|
|
|
if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
|
|
|
|
pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
|
|
|
|
cpu);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
csd = &per_cpu(backtrace_csd, cpu);
|
|
|
|
csd->func = handle_backtrace;
|
|
|
|
smp_call_function_single_async(cpu, csd);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
|
|
|
|
{
|
|
|
|
nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_64BIT
|
|
|
|
void loongarch_dump_regs64(u64 *uregs, const struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = LOONGARCH_EF_R1; i <= LOONGARCH_EF_R31; i++) {
|
|
|
|
uregs[i] = regs->regs[i - LOONGARCH_EF_R0];
|
|
|
|
}
|
|
|
|
|
|
|
|
uregs[LOONGARCH_EF_ORIG_A0] = regs->orig_a0;
|
|
|
|
uregs[LOONGARCH_EF_CSR_ERA] = regs->csr_era;
|
|
|
|
uregs[LOONGARCH_EF_CSR_BADV] = regs->csr_badvaddr;
|
|
|
|
uregs[LOONGARCH_EF_CSR_CRMD] = regs->csr_crmd;
|
|
|
|
uregs[LOONGARCH_EF_CSR_PRMD] = regs->csr_prmd;
|
|
|
|
uregs[LOONGARCH_EF_CSR_EUEN] = regs->csr_euen;
|
|
|
|
uregs[LOONGARCH_EF_CSR_ECFG] = regs->csr_ecfg;
|
|
|
|
uregs[LOONGARCH_EF_CSR_ESTAT] = regs->csr_estat;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_64BIT */
|