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acrn-kernel/arch/arm/mach-mvebu/mvebu-soc-id.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 1) Based on the normalized pattern: this file is licensed under the terms of the gnu general public license version 2 this program is licensed as is without any warranty of any kind whether express or implied extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-07 22:11:14 +08:00
/* SPDX-License-Identifier: GPL-2.0-only */
ARM: mvebu: Add support to get the ID and the revision of a SoC All the mvebu SoCs have information related to their variant and revision that can be read from the PCI control register. This patch adds support for Armada XP and Armada 370. This reading of the revision and the ID are done before the PCI initialization to avoid any conflicts. Once these data are retrieved, the resources are freed to let the PCI subsystem use it. Cc: stable@vger.kernel.org # v3.12+ Fixes: 930ab3d403ae (i2c: mv64xxx: Add I2C Transaction Generator support) Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-01-02 22:08:59 +08:00
/*
* Marvell EBU SoC ID and revision definitions.
*
* Copyright (C) 2014 Marvell Semiconductor
*/
#ifndef __LINUX_MVEBU_SOC_ID_H
#define __LINUX_MVEBU_SOC_ID_H
/* Armada XP ID */
#define MV78230_DEV_ID 0x7823
#define MV78260_DEV_ID 0x7826
#define MV78460_DEV_ID 0x7846
/* Armada XP Revision */
#define MV78XX0_A0_REV 0x1
#define MV78XX0_B0_REV 0x2
ARM: mvebu: Update the SoC ID and revision definitions Add the missing SoC and revision ID for the Armada 370 and 38x SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
2015-01-08 23:08:08 +08:00
/* Amada 370 ID */
#define ARMADA_370_DEV_ID 0x6710
/* Amada 370 Revision */
#define ARMADA_370_A1_REV 0x1
/* Armada 375 ID */
#define ARMADA_375_DEV_ID 0x6720
ARM: mvebu: Add thermal quirk for the Armada 375 DB board The initial release of the Armada 375 DB board has an Armada 375 Z1 stepping silicon. This commit introduces a quirk that allows to workaround a series of issues with the thermal sensor in this stepping, but updating the devicetree: * Updates the compatible string for the thermal, so the driver can perform a specific initialization of the sensor. * Moves the offset of the thermal control register. This quirk allows to specifiy the correct (A0 stepping) offset in the devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-9-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-25 04:23:22 +08:00
/* Armada 375 */
#define ARMADA_375_Z1_REV 0x0
ARM: mvebu: add Armada 375 A0 revision definition Now that we have access to Armada 375 A0 platforms, we can add the corresponding revision definition in mvebu-soc-id.h. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1399302326-6917-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05 23:05:24 +08:00
#define ARMADA_375_A0_REV 0x3
ARM: mvebu: Add thermal quirk for the Armada 375 DB board The initial release of the Armada 375 DB board has an Armada 375 Z1 stepping silicon. This commit introduces a quirk that allows to workaround a series of issues with the thermal sensor in this stepping, but updating the devicetree: * Updates the compatible string for the thermal, so the driver can perform a specific initialization of the sensor. * Moves the offset of the thermal control register. This quirk allows to specifiy the correct (A0 stepping) offset in the devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-9-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-25 04:23:22 +08:00
ARM: mvebu: Update the SoC ID and revision definitions Add the missing SoC and revision ID for the Armada 370 and 38x SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
2015-01-08 23:08:08 +08:00
/* Armada 38x ID */
#define ARMADA_380_DEV_ID 0x6810
#define ARMADA_385_DEV_ID 0x6820
#define ARMADA_388_DEV_ID 0x6828
/* Armada 38x Revision */
#define ARMADA_38x_Z1_REV 0x0
#define ARMADA_38x_A0_REV 0x4
ARM: mvebu: Add support to get the ID and the revision of a SoC All the mvebu SoCs have information related to their variant and revision that can be read from the PCI control register. This patch adds support for Armada XP and Armada 370. This reading of the revision and the ID are done before the PCI initialization to avoid any conflicts. Once these data are retrieved, the resources are freed to let the PCI subsystem use it. Cc: stable@vger.kernel.org # v3.12+ Fixes: 930ab3d403ae (i2c: mv64xxx: Add I2C Transaction Generator support) Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-01-02 22:08:59 +08:00
#ifdef CONFIG_ARCH_MVEBU
int mvebu_get_soc_id(u32 *dev, u32 *rev);
#else
static inline int mvebu_get_soc_id(u32 *dev, u32 *rev)
{
return -1;
}
#endif
#endif /* __LINUX_MVEBU_SOC_ID_H */