2006-05-24 08:18:44 +08:00
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#
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# DMA engine configuration
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#
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2007-10-16 16:27:42 +08:00
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menuconfig DMADEVICES
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2007-11-29 08:21:43 +08:00
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bool "DMA Engine support"
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2008-03-01 22:42:48 +08:00
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depends on (PCI && X86) || ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX || PPC
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2008-02-03 10:49:57 +08:00
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depends on !HIGHMEM64G
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2007-10-16 16:27:42 +08:00
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help
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2007-11-29 08:21:43 +08:00
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DMA engines can do asynchronous data transfers without
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involving the host CPU. Currently, this framework can be
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used to offload memory copies in the network stack and
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RAID operations in the MD driver.
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2007-10-16 16:27:42 +08:00
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if DMADEVICES
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comment "DMA Devices"
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config INTEL_IOATDMA
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tristate "Intel I/OAT DMA support"
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depends on PCI && X86
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select DMA_ENGINE
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select DCA
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help
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Enable support for the Intel(R) I/OAT DMA engine present
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in recent Intel Xeon chipsets.
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Say Y here if you have such a chipset.
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If unsure, say N.
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config INTEL_IOP_ADMA
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tristate "Intel IOP ADMA support"
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depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
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select ASYNC_CORE
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select DMA_ENGINE
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help
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Enable support for the Intel(R) IOP Series RAID engines.
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2006-05-24 08:18:44 +08:00
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2008-03-01 22:42:48 +08:00
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config FSL_DMA
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bool "Freescale MPC85xx/MPC83xx DMA support"
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depends on PPC
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select DMA_ENGINE
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---help---
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Enable support for the Freescale DMA engine. Now, it support
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MPC8560/40, MPC8555, MPC8548 and MPC8641 processors.
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The MPC8349, MPC8360 is also supported.
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config FSL_DMA_SELFTEST
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bool "Enable the self test for each DMA channel"
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depends on FSL_DMA
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default y
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---help---
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Enable the self test for each DMA channel. A self test will be
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performed after the channel probed to ensure the DMA works well.
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2006-05-24 08:18:44 +08:00
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config DMA_ENGINE
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2007-10-16 16:27:42 +08:00
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bool
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2006-05-24 08:18:44 +08:00
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2006-06-18 12:24:58 +08:00
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comment "DMA Clients"
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2007-10-16 16:27:42 +08:00
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depends on DMA_ENGINE
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2006-06-18 12:24:58 +08:00
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config NET_DMA
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bool "Network: TCP receive copy offload"
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depends on DMA_ENGINE && NET
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2007-10-16 16:27:42 +08:00
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help
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2006-06-18 12:24:58 +08:00
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This enables the use of DMA engines in the network stack to
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offload receive copy-to-user operations, freeing CPU cycles.
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Since this is the main user of the DMA engine, it should be enabled;
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say Y here.
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2007-10-16 16:27:42 +08:00
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endif
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