2022-05-31 18:04:11 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*
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* Derived from MIPS:
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* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2001 MIPS Technologies, Inc.
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*/
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#include <asm/asm.h>
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#include <asm/asmmacro.h>
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#include <asm/loongarch.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/thread_info.h>
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.text
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.cfi_sections .debug_frame
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.align 5
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SYM_FUNC_START(handle_syscall)
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csrrd t0, PERCPU_BASE_KS
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la.abs t1, kernelsp
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add.d t1, t1, t0
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move t2, sp
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ld.d sp, t1, 0
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addi.d sp, sp, -PT_SIZE
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cfi_st t2, PT_R3
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2022-07-26 23:57:22 +08:00
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cfi_rel_offset sp, PT_R3
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2022-05-31 18:04:11 +08:00
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st.d zero, sp, PT_R0
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csrrd t2, LOONGARCH_CSR_PRMD
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st.d t2, sp, PT_PRMD
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csrrd t2, LOONGARCH_CSR_CRMD
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st.d t2, sp, PT_CRMD
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csrrd t2, LOONGARCH_CSR_EUEN
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st.d t2, sp, PT_EUEN
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csrrd t2, LOONGARCH_CSR_ECFG
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st.d t2, sp, PT_ECFG
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csrrd t2, LOONGARCH_CSR_ESTAT
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st.d t2, sp, PT_ESTAT
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cfi_st ra, PT_R1
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cfi_st a0, PT_R4
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cfi_st a1, PT_R5
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cfi_st a2, PT_R6
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cfi_st a3, PT_R7
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cfi_st a4, PT_R8
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cfi_st a5, PT_R9
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cfi_st a6, PT_R10
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cfi_st a7, PT_R11
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csrrd ra, LOONGARCH_CSR_ERA
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st.d ra, sp, PT_ERA
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2022-07-26 23:57:22 +08:00
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cfi_rel_offset ra, PT_ERA
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2022-05-31 18:04:11 +08:00
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cfi_st tp, PT_R2
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cfi_st u0, PT_R21
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cfi_st fp, PT_R22
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SAVE_STATIC
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move u0, t0
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li.d tp, ~_THREAD_MASK
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and tp, tp, sp
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move a0, sp
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bl do_syscall
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RESTORE_ALL_AND_RET
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SYM_FUNC_END(handle_syscall)
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SYM_CODE_START(ret_from_fork)
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bl schedule_tail # a0 = struct task_struct *prev
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move a0, sp
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bl syscall_exit_to_user_mode
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RESTORE_STATIC
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RESTORE_SOME
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RESTORE_SP_AND_RET
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SYM_CODE_END(ret_from_fork)
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SYM_CODE_START(ret_from_kernel_thread)
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bl schedule_tail # a0 = struct task_struct *prev
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move a0, s1
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jirl ra, s0, 0
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move a0, sp
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bl syscall_exit_to_user_mode
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RESTORE_STATIC
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RESTORE_SOME
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RESTORE_SP_AND_RET
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SYM_CODE_END(ret_from_kernel_thread)
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