37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VM_CONFIGURATIONS_H
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#define VM_CONFIGURATIONS_H
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#include <misc_cfg.h>
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/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
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#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \
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GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)
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#define CONFIG_MAX_VM_NUM (3U + CONFIG_MAX_KATA_VM_NUM)
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#define VM0_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(3U)}
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#define VM0_CONFIG_MEM_START_HPA 0x100000000UL
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#define VM0_CONFIG_MEM_SIZE 0x20000000UL
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#define SOS_VM_BOOTARGS SOS_ROOTFS \
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"rw rootwait " \
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"console=tty0 " \
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SOS_CONSOLE \
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"consoleblank=0 " \
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"no_timer_check " \
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"quiet loglevel=3 " \
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"i915.nuclear_pageflip=1 " \
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"i915.avail_planes_per_pipe=0x010700 " \
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"i915.domain_plane_owners=0x011100001111 " \
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"i915.enable_gvt=1 " \
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SOS_BOOTARGS_DIFF
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#define VM2_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(2U)}
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#endif /* VM_CONFIGURATIONS_H */
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