acrn-hypervisor/hypervisor/boot
Jian Jun Chen 97a2919138 hv: tsc: calibrate TSC by HPET
On some platforms CPUID.0x15:ECX is zero and CPUID.0x16 can
only return the TSC frequency in MHZ which is not accurate.
For example the TSC frequency obtained by CPUID.0x16 is 2300
MHZ and the TSC frequency calibrated by HPET is 2303.998 MHZ
which is much closer to the actual TSC frequency 2304.000 MHZ.
This patch adds the support of using HPET to calibrate TSC
when HPET is available and CPUID.0x15:ECX is zero.

v3->v4:
  - move calc_tsc_by_hpet into hpet_calibrate_tsc

v2->v3:
  - remove the NULL check in hpet_init
  - remove ""& 0xFFFFFFFFU" in tsc_read_hpet
  - add comment for the counter wrap in the low 32 bits in
    calc_tsc_by_hpet
  - use a dedicated function for hpet_calibrate_tsc

v1->v2:
  - change native_calibrate_tsc_cpuid_0x15/0x16 to
    native_calculate_tsc_cpuid_0x15/0x16
  - move hpet_init to BSP init
  - encapsulate both HPET and PIT calibration to one function
  - revise the commit message with an example"

Tracked-On: #7876
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2022-07-17 16:48:47 +08:00
..
guest Update copyright year range in code headers 2022-07-15 11:48:35 +08:00
include hv: tsc: calibrate TSC by HPET 2022-07-17 16:48:47 +08:00
multiboot Update copyright year range in code headers 2022-07-15 11:48:35 +08:00
acpi_base.c hv: tsc: calibrate TSC by HPET 2022-07-17 16:48:47 +08:00
boot.c HV: treewide: fix violations of coding guideline C-TY-12 2021-11-04 18:15:47 +08:00
reloc.c Update copyright year range in code headers 2022-07-15 11:48:35 +08:00