30549a59c7
Current only 8 vioapic pins for pci irq (total 24 with 16 reserved), which easily leads virtual GSI sharing with more and more passthrough devices. This patch doulbes vioapic pin count and adds reboot hooks to allocate from same pin after each reboot. Signed-off-by: Edwin Zhai <edwin.zhai@intel.com> Reviewed-by: Yin Fengwei <fengwei.yin@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Eddie Dong <eddie.dong@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> |
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| .. | ||
| pci | ||
| platform | ||
| block_if.c | ||
| uart_core.c | ||
| usb_core.c | ||