1236 lines
54 KiB
XML
1236 lines
54 KiB
XML
<acrn-config board="qemu">
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<BIOS_INFO>
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BIOS Information
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Vendor: SeaBIOS
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Version: rel-1.12.1-0-ga5cab58e9a3f-prebuilt.qemu.org
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Release Date: 04/01/2014
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BIOS Revision: 0.0
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</BIOS_INFO>
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<BASE_BOARD_INFO>
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</BASE_BOARD_INFO>
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<PCI_DEVICE>
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00:00.0 Host bridge: Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller
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00:01.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde00000 (32-bit, non-prefetchable) [size=4K]
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00:01.1 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde01000 (32-bit, non-prefetchable) [size=4K]
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00:01.2 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde02000 (32-bit, non-prefetchable) [size=4K]
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00:01.3 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde03000 (32-bit, non-prefetchable) [size=4K]
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00:01.4 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde04000 (32-bit, non-prefetchable) [size=4K]
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00:01.5 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
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Region 0: Memory at fde05000 (32-bit, non-prefetchable) [size=4K]
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00:1d.0 USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 (rev 03)
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00:1d.1 USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 (rev 03)
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00:1d.2 USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 (rev 03)
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00:1d.7 USB controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 (rev 03)
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Region 0: Memory at fde06000 (32-bit, non-prefetchable) [size=4K]
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00:1f.0 ISA bridge: Intel Corporation 82801IB (ICH9) LPC Interface Controller (rev 02)
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00:1f.2 SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA Controller [AHCI mode] (rev 02)
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Region 5: Memory at fde07000 (32-bit, non-prefetchable) [size=4K]
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00:1f.3 SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 02)
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01:00.0 Ethernet controller: Red Hat, Inc. Virtio network device (rev 01)
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Region 1: Memory at fdc40000 (32-bit, non-prefetchable) [size=4K]
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Region 4: Memory at fea00000 (64-bit, prefetchable) [size=16K]
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02:00.0 Communication controller: Red Hat, Inc. Virtio console (rev 01)
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Region 1: Memory at fda00000 (32-bit, non-prefetchable) [size=4K]
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Region 4: Memory at fe800000 (64-bit, prefetchable) [size=16K]
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03:00.0 SCSI storage controller: Red Hat, Inc. Virtio block device (rev 01)
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Region 1: Memory at fd800000 (32-bit, non-prefetchable) [size=4K]
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Region 4: Memory at fe600000 (64-bit, prefetchable) [size=16K]
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04:00.0 Unclassified device [00ff]: Red Hat, Inc. Virtio memory balloon (rev 01)
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Region 4: Memory at fe400000 (64-bit, prefetchable) [size=16K]
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05:00.0 Unclassified device [00ff]: Red Hat, Inc. Virtio RNG (rev 01)
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Region 4: Memory at fe200000 (64-bit, prefetchable) [size=16K]
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</PCI_DEVICE>
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<PCI_VID_PID>
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00:00.0 0600: 8086:29c0
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00:01.0 0604: 1b36:000c
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00:01.1 0604: 1b36:000c
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00:01.2 0604: 1b36:000c
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00:01.3 0604: 1b36:000c
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00:01.4 0604: 1b36:000c
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00:01.5 0604: 1b36:000c
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00:1d.0 0c03: 8086:2934 (rev 03)
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00:1d.1 0c03: 8086:2935 (rev 03)
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00:1d.2 0c03: 8086:2936 (rev 03)
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00:1d.7 0c03: 8086:293a (rev 03)
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00:1f.0 0601: 8086:2918 (rev 02)
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00:1f.2 0106: 8086:2922 (rev 02)
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00:1f.3 0c05: 8086:2930 (rev 02)
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01:00.0 0200: 1af4:1041 (rev 01)
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02:00.0 0780: 1af4:1043 (rev 01)
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03:00.0 0100: 1af4:1042 (rev 01)
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04:00.0 00ff: 1af4:1045 (rev 01)
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05:00.0 00ff: 1af4:1044 (rev 01)
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</PCI_VID_PID>
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<WAKE_VECTOR_INFO>
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#define WAKE_VECTOR_32 0x7FFDFD8CUL
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#define WAKE_VECTOR_64 0x7FFDFD98UL
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</WAKE_VECTOR_INFO>
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<RESET_REGISTER_INFO>
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#define RESET_REGISTER_ADDRESS 0xCF9UL
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#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO
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#define RESET_REGISTER_VALUE 0xfU
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</RESET_REGISTER_INFO>
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<PM_INFO>
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0x20U
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#define PM1A_EVT_BIT_OFFSET 0x0U
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#define PM1A_EVT_ADDRESS 0x600UL
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#define PM1A_EVT_ACCESS_SIZE 0x0U
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_MEMORY
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#define PM1B_EVT_BIT_WIDTH 0x0U
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#define PM1B_EVT_BIT_OFFSET 0x0U
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#define PM1B_EVT_ADDRESS 0x0UL
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#define PM1B_EVT_ACCESS_SIZE 0x0U
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0x10U
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#define PM1A_CNT_BIT_OFFSET 0x0U
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#define PM1A_CNT_ADDRESS 0x604UL
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#define PM1A_CNT_ACCESS_SIZE 0x0U
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_MEMORY
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#define PM1B_CNT_BIT_WIDTH 0x0U
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#define PM1B_CNT_BIT_OFFSET 0x0U
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#define PM1B_CNT_ADDRESS 0x0UL
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#define PM1B_CNT_ACCESS_SIZE 0x0U
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</PM_INFO>
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<S3_INFO>
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</S3_INFO>
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<S5_INFO>
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</S5_INFO>
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<DRHD_INFO>
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#define DRHD_COUNT 1U
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#define DRHD0_DEV_CNT 0x1U
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#define DRHD0_SEGMENT 0x0U
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#define DRHD0_FLAGS 0x1U
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#define DRHD0_REG_BASE 0xFED90000UL
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#define DRHD0_IGNORE false
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#define DRHD0_DEVSCOPE0_TYPE 0x3U
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#define DRHD0_DEVSCOPE0_ID 0x0U
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#define DRHD0_DEVSCOPE0_BUS 0xffU
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#define DRHD0_DEVSCOPE0_PATH 0x0U
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</DRHD_INFO>
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<CPU_BRAND>
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"Intel Atom Processor (Denverton)"
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</CPU_BRAND>
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<CX_INFO>
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/* Cx data is not available */
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</CX_INFO>
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<PX_INFO>
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/* Px data is not available */
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</PX_INFO>
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<MMCFG_BASE_INFO>
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/* PCI mmcfg base of MCFG */
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#define DEFAULT_PCI_MMCFG_BASE 0xb0000000UL
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</MMCFG_BASE_INFO>
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<TPM_INFO>
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/* no TPM device */
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</TPM_INFO>
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<CLOS_INFO>
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</CLOS_INFO>
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<IOMEM_INFO>
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00000000-00000fff : Reserved
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00001000-0009fbff : System RAM
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0009fc00-0009ffff : Reserved
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000a0000-000bffff : PCI Bus 0000:00
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000c0000-000c0dff : Video ROM
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000f0000-000fffff : Reserved
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000f0000-000fffff : System ROM
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00100000-7ffd8fff : System RAM
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5ac00000-5b8031d0 : Kernel code
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5b8031d1-5c26cebf : Kernel data
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5c4ee000-5c796fff : Kernel bss
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7ffd9000-7fffffff : Reserved
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80000000-afffffff : PCI Bus 0000:00
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b0000000-bfffffff : PCI MMCONFIG 0000 [bus 00-ff]
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b0000000-bfffffff : Reserved
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c0000000-febfffff : PCI Bus 0000:00
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fd200000-fd3fffff : PCI Bus 0000:06
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fd400000-fd5fffff : PCI Bus 0000:05
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fd600000-fd7fffff : PCI Bus 0000:04
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fd800000-fd9fffff : PCI Bus 0000:03
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fd800000-fd800fff : 0000:03:00.0
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fda00000-fdbfffff : PCI Bus 0000:02
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fda00000-fda00fff : 0000:02:00.0
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fdc00000-fddfffff : PCI Bus 0000:01
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fdc00000-fdc3ffff : 0000:01:00.0
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fdc40000-fdc40fff : 0000:01:00.0
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fde00000-fde00fff : 0000:00:01.0
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fde01000-fde01fff : 0000:00:01.1
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fde02000-fde02fff : 0000:00:01.2
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fde03000-fde03fff : 0000:00:01.3
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fde04000-fde04fff : 0000:00:01.4
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fde05000-fde05fff : 0000:00:01.5
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fde06000-fde06fff : 0000:00:1d.7
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fde06000-fde06fff : ehci_hcd
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fde07000-fde07fff : 0000:00:1f.2
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fde07000-fde07fff : ahci
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fe000000-fe1fffff : PCI Bus 0000:06
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fe200000-fe3fffff : PCI Bus 0000:05
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fe200000-fe203fff : 0000:05:00.0
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fe200000-fe203fff : virtio-pci-modern
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fe400000-fe5fffff : PCI Bus 0000:04
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fe400000-fe403fff : 0000:04:00.0
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fe400000-fe403fff : virtio-pci-modern
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fe600000-fe7fffff : PCI Bus 0000:03
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fe600000-fe603fff : 0000:03:00.0
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fe600000-fe603fff : virtio-pci-modern
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fe800000-fe9fffff : PCI Bus 0000:02
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fe800000-fe803fff : 0000:02:00.0
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fe800000-fe803fff : virtio-pci-modern
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fea00000-febfffff : PCI Bus 0000:01
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fea00000-fea03fff : 0000:01:00.0
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fea00000-fea03fff : virtio-pci-modern
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fec00000-fec003ff : IOAPIC 0
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fed00000-fed003ff : HPET 0
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fed00000-fed003ff : PNP0103:00
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fed1c000-fed1ffff : Reserved
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fed1f410-fed1f414 : iTCO_wdt.0.auto
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fed90000-fed90fff : dmar0
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fee00000-fee00fff : Local APIC
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feffc000-feffffff : Reserved
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fffc0000-ffffffff : Reserved
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100000000-17fffffff : System RAM
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180000000-97fffffff : PCI Bus 0000:00
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</IOMEM_INFO>
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<BLOCK_DEVICE_INFO>
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/dev/vda1: TYPE="ext4"
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</BLOCK_DEVICE_INFO>
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<TTYS_INFO>
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seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
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</TTYS_INFO>
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<AVAILABLE_IRQ_INFO>
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3, 5, 6, 7, 10, 11, 13, 14, 15
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</AVAILABLE_IRQ_INFO>
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<TOTAL_MEM_INFO>
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4038724 kB
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</TOTAL_MEM_INFO>
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<CPU_PROCESSOR_INFO>
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0, 1, 2, 3
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</CPU_PROCESSOR_INFO>
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<MAX_MSIX_TABLE_NUM>
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3
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</MAX_MSIX_TABLE_NUM>
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<processors>
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<model description="Intel Atom Processor (Denverton)">
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<family_id>0x6</family_id>
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<model_id>0x5f</model_id>
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<core_type></core_type>
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<native_model_id></native_model_id>
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<capability id="sse3"/>
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<capability id="pclmulqdq"/>
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<capability id="vmx"/>
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|
<capability id="ssse3"/>
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<capability id="cmpxchg16b"/>
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<capability id="sse4_1"/>
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<capability id="sse4_2"/>
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<capability id="x2apic"/>
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<capability id="movbe"/>
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|
<capability id="popcnt"/>
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|
<capability id="tsc_deadline"/>
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<capability id="aes"/>
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<capability id="rdrand"/>
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<capability id="fpu"/>
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<capability id="vme"/>
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<capability id="de"/>
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<capability id="pse"/>
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<capability id="tsc"/>
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<capability id="msr"/>
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<capability id="pae"/>
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<capability id="mce"/>
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<capability id="cx8"/>
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<capability id="apic"/>
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<capability id="sep"/>
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<capability id="mtrr"/>
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|
<capability id="pge"/>
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|
<capability id="mca"/>
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<capability id="cmov"/>
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|
<capability id="pat"/>
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<capability id="pse36"/>
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<capability id="clfsh"/>
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|
<capability id="mmx"/>
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<capability id="fxsr"/>
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|
<capability id="sse"/>
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<capability id="sse2"/>
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<capability id="fsgsbase"/>
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<capability id="smep"/>
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<capability id="erms"/>
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|
<capability id="mpx"/>
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|
<capability id="rdseed"/>
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|
<capability id="smap"/>
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|
<capability id="clflushopt"/>
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|
<capability id="ibrs_ibpb"/>
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|
<capability id="ia32_arch_capabilities"/>
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|
<capability id="ssbd"/>
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|
<capability id="lahf_sahf_64"/>
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|
<capability id="prefetchw"/>
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|
<capability id="syscall_sysret_64"/>
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|
<capability id="execute_disable"/>
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|
<capability id="gbyte_pages"/>
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|
<capability id="rdtscp_ia32_tsc_aux"/>
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|
<capability id="intel_64"/>
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<capability id="invariant_tsc"/>
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|
<attribute id="physical_address_bits">40</attribute>
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|
<attribute id="linear_address_bits">48</attribute>
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</model>
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<die id="0">
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<core id="0x0">
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|
<thread id="0x0">
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<cpu_id>0</cpu_id>
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|
<apic_id>0x0</apic_id>
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|
<x2apic_id>0x0</x2apic_id>
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<family_id>0x6</family_id>
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<model_id>0x5f</model_id>
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|
<stepping_id>0x1</stepping_id>
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<core_type></core_type>
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<native_model_id></native_model_id>
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</thread>
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</core>
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<core id="0x1">
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|
<thread id="0x1">
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<cpu_id>1</cpu_id>
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|
<apic_id>0x1</apic_id>
|
|
<x2apic_id>0x1</x2apic_id>
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|
<family_id>0x6</family_id>
|
|
<model_id>0x5f</model_id>
|
|
<stepping_id>0x1</stepping_id>
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|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
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|
</thread>
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|
</core>
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|
<core id="0x2">
|
|
<thread id="0x2">
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|
<cpu_id>2</cpu_id>
|
|
<apic_id>0x2</apic_id>
|
|
<x2apic_id>0x2</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x5f</model_id>
|
|
<stepping_id>0x1</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
<core id="0x3">
|
|
<thread id="0x3">
|
|
<cpu_id>3</cpu_id>
|
|
<apic_id>0x3</apic_id>
|
|
<x2apic_id>0x3</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x5f</model_id>
|
|
<stepping_id>0x1</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
</die>
|
|
</processors>
|
|
<caches>
|
|
<cache level="1" id="0x0" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x0" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x1" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x1</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x1" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x1</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x2" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x2" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x3" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x3</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x3" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x3</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x0" type="3">
|
|
<cache_size>4194304</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>4096</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x1" type="3">
|
|
<cache_size>4194304</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>4096</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x1</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x2" type="3">
|
|
<cache_size>4194304</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>4096</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x3" type="3">
|
|
<cache_size>4194304</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>4096</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>1</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x3</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="3" id="0x0" type="3">
|
|
<cache_size>16777216</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>16384</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>1</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="3" id="0x1" type="3">
|
|
<cache_size>16777216</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>16384</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>1</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x1</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="3" id="0x2" type="3">
|
|
<cache_size>16777216</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>16384</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>1</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="3" id="0x3" type="3">
|
|
<cache_size>16777216</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>16384</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>1</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x3</processor>
|
|
</processors>
|
|
</cache>
|
|
</caches>
|
|
<memory>
|
|
<range start="0x0000000000000000" end="0x000000000009fbff" size="654336"/>
|
|
<range start="0x0000000000100000" end="0x000000007ffd8fff" size="2146275328"/>
|
|
<range start="0x0000000100000000" end="0x000000017fffffff" size="2147483648"/>
|
|
</memory>
|
|
<devices>
|
|
<bus type="system">
|
|
<acpi_object>\_SB_</acpi_object>
|
|
<bus id="PNP0A08" type="pci" address="0x0" description="Host bridge: Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x29c0</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x060000</class>
|
|
<acpi_object>\_SB_.PCI0</acpi_object>
|
|
<compatible_id>PNP0A03</compatible_id>
|
|
<acpi_uid>1</acpi_uid>
|
|
<resource id="res0" type="bus_number" min="0x0" max="0xff" len="0x100"/>
|
|
<resource id="res2" type="io_port" min="0x0" max="0xcf7" len="0xcf8"/>
|
|
<resource id="res1" type="io_port" min="0xcf8" max="0xcf8" len="0x8"/>
|
|
<resource id="res3" type="io_port" min="0xd00" max="0xffff" len="0xf300"/>
|
|
<resource id="res4" type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
|
|
<resource id="res5" type="memory" min="0x80000000" max="0xafffffff" len="0x30000000"/>
|
|
<resource id="res6" type="memory" min="0xc0000000" max="0xfebfffff" len="0x3ec00000"/>
|
|
<resource id="res7" type="memory" min="0x180000000" max="0x97fffffff" len="0x800000000"/>
|
|
<interrupt_pin_routing>
|
|
<routing address="0xffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x1ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0x2ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0x3ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0x4ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x5ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0x6ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0x7ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0x8ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x9ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0xaffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0xbffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0xcffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0xdffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0xeffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0xfffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0x10ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x11ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0x12ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0x13ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0x14ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x15ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIE" index="0"/>
|
|
</routing>
|
|
<routing address="0x16ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIF" index="0"/>
|
|
</routing>
|
|
<routing address="0x17ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIH" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIG" index="0"/>
|
|
</routing>
|
|
<routing address="0x18ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x19ffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
<routing address="0x1affff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
<routing address="0x1bffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
<routing address="0x1cffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
<routing address="0x1dffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
<routing address="0x1effff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIE" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIF" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIG" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSIH" index="0"/>
|
|
</routing>
|
|
<routing address="0x1fffff">
|
|
<mapping pin="INTA#" source="\_SB_.GSIA" index="0"/>
|
|
<mapping pin="INTB#" source="\_SB_.GSIB" index="0"/>
|
|
<mapping pin="INTC#" source="\_SB_.GSIC" index="0"/>
|
|
<mapping pin="INTD#" source="\_SB_.GSID" index="0"/>
|
|
</routing>
|
|
</interrupt_pin_routing>
|
|
<device address="0x0">
|
|
<acpi_object>\_SB_.PCI0.S00_</acpi_object>
|
|
<aml_template>5b82165c2f035f53425f504349305330305f085f41445200</aml_template>
|
|
</device>
|
|
<device address="0x10000" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<acpi_object>\_SB_.PCI0.S08_</acpi_object>
|
|
<aml_template>5b821a5c2f035f53425f504349305330385f085f4144520c00000100</aml_template>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x1000" max="0x1fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfdc00000" max="0xfddfffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde00000" max="0xfde00fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x1">
|
|
<device address="0x0" id="0x1041" description="Ethernet controller: Red Hat, Inc. Virtio network device">
|
|
<vendor>0x1af4</vendor>
|
|
<identifier>0x1041</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x020000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0xfdc40000" max="0xfdc40fff" len="0x1000" id="bar1" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xfea00000" max="0xfea03fff" len="0x4000" id="bar4" width="64" prefetchable="1"/>
|
|
<capability id="MSI-X">
|
|
<table_size>3</table_size>
|
|
<table_bir>3</table_bir>
|
|
<table_offset>0x8010000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="PCI Express"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x10001" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x2000" max="0x2fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfda00000" max="0xfdbfffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde01000" max="0xfde01fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x2">
|
|
<device address="0x0" id="0x1043" description="Communication controller: Red Hat, Inc. Virtio console">
|
|
<vendor>0x1af4</vendor>
|
|
<identifier>0x1043</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x078000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0xfda00000" max="0xfda00fff" len="0x1000" id="bar1" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xfe800000" max="0xfe803fff" len="0x4000" id="bar4" width="64" prefetchable="1"/>
|
|
<capability id="MSI-X">
|
|
<table_size>2</table_size>
|
|
<table_bir>3</table_bir>
|
|
<table_offset>0x8010000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="PCI Express"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x10002" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x3000" max="0x3fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfd800000" max="0xfd9fffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde02000" max="0xfde02fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x3">
|
|
<device address="0x0" id="0x1042" description="SCSI storage controller: Red Hat, Inc. Virtio block device">
|
|
<vendor>0x1af4</vendor>
|
|
<identifier>0x1042</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x010000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0xfd800000" max="0xfd800fff" len="0x1000" id="bar1" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xfe600000" max="0xfe603fff" len="0x4000" id="bar4" width="64" prefetchable="1"/>
|
|
<capability id="MSI-X">
|
|
<table_size>2</table_size>
|
|
<table_bir>3</table_bir>
|
|
<table_offset>0x8010000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="PCI Express"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x10003" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x4000" max="0x4fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfd600000" max="0xfd7fffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde03000" max="0xfde03fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x4">
|
|
<device address="0x0" id="0x1045" description="Unclassified device: Red Hat, Inc. Virtio memory balloon">
|
|
<vendor>0x1af4</vendor>
|
|
<identifier>0x1045</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x00ff00</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0xfe400000" max="0xfe403fff" len="0x4000" id="bar4" width="64" prefetchable="1"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="PCI Express"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x10004" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x5000" max="0x5fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfd400000" max="0xfd5fffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde04000" max="0xfde04fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x5">
|
|
<device address="0x0" id="0x1044" description="Unclassified device: Red Hat, Inc. Virtio RNG">
|
|
<vendor>0x1af4</vendor>
|
|
<identifier>0x1044</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x00ff00</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0xfe200000" max="0xfe203fff" len="0x4000" id="bar4" width="64" prefetchable="1"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="PCI Express"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x10005" id="0x000c" description="PCI bridge: Red Hat, Inc. QEMU PCIe Root port">
|
|
<vendor>0x1b36</vendor>
|
|
<identifier>0x000c</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="21"/>
|
|
<resource type="io_port" min="0x6000" max="0x6fff" len="0x1000"/>
|
|
<resource type="memory" min="0xfd200000" max="0xfd3fffff" len="0x200000"/>
|
|
<resource type="memory" min="0xfde05000" max="0xfde05fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>1</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x8000000</table_offset>
|
|
<pba_bir>0</pba_bir>
|
|
<pba_offset>0x8100000</pba_offset>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<bus type="pci" address="0x6"/>
|
|
</device>
|
|
<device address="0x1d0000" id="0x2934" description="USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2934</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x0c0300</class>
|
|
<acpi_object>\_SB_.PCI0.SE8_</acpi_object>
|
|
<aml_template>5b821a5c2f035f53425f504349305345385f085f4144520c00001d00</aml_template>
|
|
<resource type="interrupt_pin" pin="INTA#" source="16"/>
|
|
<resource type="io_port" min="0xc040" max="0xc05f" len="0x20" id="bar4"/>
|
|
</device>
|
|
<device address="0x1d0001" id="0x2935" description="USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2935</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x0c0300</class>
|
|
<resource type="interrupt_pin" pin="INTB#" source="17"/>
|
|
<resource type="io_port" min="0xc060" max="0xc07f" len="0x20" id="bar4"/>
|
|
</device>
|
|
<device address="0x1d0002" id="0x2936" description="USB controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2936</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x0c0300</class>
|
|
<resource type="interrupt_pin" pin="INTC#" source="18"/>
|
|
<resource type="io_port" min="0xc080" max="0xc09f" len="0x20" id="bar4"/>
|
|
</device>
|
|
<device address="0x1d0007" id="0x293a" description="USB controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x293a</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x0c0320</class>
|
|
<resource type="interrupt_pin" pin="INTD#" source="19"/>
|
|
<resource type="memory" min="0xfde06000" max="0xfde06fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
</device>
|
|
<device address="0x1f0000" id="0x2918" description="ISA bridge: Intel Corporation 82801IB (ICH9) LPC Interface Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2918</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x060100</class>
|
|
<acpi_object>\_SB_.PCI0.ISA_</acpi_object>
|
|
<aml_template>5b821a5c2f035f53425f504349304953415f085f4144520c00001f00</aml_template>
|
|
<device id="PNP0303">
|
|
<acpi_object>\_SB_.PCI0.ISA_.KBD_</acpi_object>
|
|
<aml_template>5b8244045c2f045f53425f504349304953415f4b42445f085f5354410a0f085f4849440c41d00303085f43525311180a15470160006000010147016400640001012202007900</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
<resource id="res0" type="io_port" min="0x60" max="0x60" len="0x1"/>
|
|
<resource id="res1" type="io_port" min="0x64" max="0x64" len="0x1"/>
|
|
<resource id="res2" type="irq" int="1"/>
|
|
</device>
|
|
<device id="PNP0F13">
|
|
<acpi_object>\_SB_.PCI0.ISA_.MOU_</acpi_object>
|
|
<aml_template>5b82335c2f045f53425f504349304953415f4d4f555f085f5354410a0f085f4849440c41d00f13085f43525311080a052200107900</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
<resource id="res0" type="irq" int="12"/>
|
|
</device>
|
|
<device id="PNP0B00">
|
|
<acpi_object>\_SB_.PCI0.ISA_.RTC_</acpi_object>
|
|
<aml_template>5b823c5c2f045f53425f504349304953415f5254435f085f4849440c41d00b00085f43525311180a15470170007000100222000147017200720002067900</aml_template>
|
|
<resource id="res0" type="io_port" min="0x70" max="0x70" len="0x2"/>
|
|
<resource id="res2" type="io_port" min="0x72" max="0x72" len="0x6"/>
|
|
<resource id="res1" type="irq" int="8"/>
|
|
</device>
|
|
</device>
|
|
<device address="0x1f0002" id="0x2922" description="SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA Controller [AHCI mode]">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2922</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x010601</class>
|
|
<resource type="interrupt_pin" pin="INTA#" source="16"/>
|
|
<resource type="io_port" min="0xc0a0" max="0xc0bf" len="0x20" id="bar4"/>
|
|
<resource type="memory" min="0xfde07000" max="0xfde07fff" len="0x1000" id="bar5" width="32" prefetchable="0"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Reserved (0x12)"/>
|
|
</device>
|
|
<device id="APP0005" address="0x1f0003" description="SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x2930</identifier>
|
|
<subsystem_vendor>0x1af4</subsystem_vendor>
|
|
<subsystem_identifier>0x1100</subsystem_identifier>
|
|
<class>0x0c0500</class>
|
|
<acpi_object>\_SB_.PCI0.SMB0</acpi_object>
|
|
<aml_template>5b82245c2f035f53425f50434930534d4230085f4849440c06100005085f4144520c03001f00</aml_template>
|
|
<resource type="interrupt_pin" pin="INTA#" source="16"/>
|
|
<resource type="io_port" min="0x700" max="0x73f" len="0x40" id="bar4"/>
|
|
</device>
|
|
<device id="QEMU0002">
|
|
<acpi_object>\_SB_.PCI0.FWCF</acpi_object>
|
|
<aml_template>5b82395c2f035f53425f5043493046574346085f5354410a0b085f4849440d51454d553030303200085f435253110d0a0a470110051005010c7900</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
<resource id="res0" type="io_port" min="0x510" max="0x510" len="0xc"/>
|
|
</device>
|
|
<device id="PNP0A06">
|
|
<acpi_object>\_SB_.PCI0.GPE0</acpi_object>
|
|
<acpi_uid>GPE0 resources</acpi_uid>
|
|
<aml_template>5b824e045c2f035f53425f5043493047504530085f5354410a0b085f4849440d504e503041303600085f5549440d47504530207265736f757263657300085f435253110d0a0a47012006200601107900</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
<resource id="res0" type="io_port" min="0x620" max="0x620" len="0x10"/>
|
|
</device>
|
|
<device id="PNP0A06">
|
|
<acpi_object>\_SB_.PCI0.PRES</acpi_object>
|
|
<acpi_uid>CPU Hotplug resources</acpi_uid>
|
|
<aml_template>5b824a045c2f035f53425f5043493050524553085f4849440c41d00a06085f5549440d43505520486f74706c7567207265736f757263657300085f435253110d0a0a4701d80cd80c010c7900</aml_template>
|
|
<resource id="res0" type="io_port" min="0xcd8" max="0xcd8" len="0xc"/>
|
|
</device>
|
|
</bus>
|
|
<device id="ACPI0010">
|
|
<acpi_object>\_SB_.CPUS</acpi_object>
|
|
<compatible_id>PNP0A05</compatible_id>
|
|
<aml_template>5b82215c2e5f53425f43505553085f5354410a0f085f4849440d414350493030313000</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIA</acpi_object>
|
|
<acpi_uid>16</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534941085f4849440c41d00c0f085f5549440a10085f435253110e0a0b8906000901100000007900</aml_template>
|
|
<resource id="res0" type="irq" int="16"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIB</acpi_object>
|
|
<acpi_uid>17</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534942085f4849440c41d00c0f085f5549440a11085f435253110e0a0b8906000901110000007900</aml_template>
|
|
<resource id="res0" type="irq" int="17"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIC</acpi_object>
|
|
<acpi_uid>18</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534943085f4849440c41d00c0f085f5549440a12085f435253110e0a0b8906000901120000007900</aml_template>
|
|
<resource id="res0" type="irq" int="18"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSID</acpi_object>
|
|
<acpi_uid>19</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534944085f4849440c41d00c0f085f5549440a13085f435253110e0a0b8906000901130000007900</aml_template>
|
|
<resource id="res0" type="irq" int="19"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIE</acpi_object>
|
|
<acpi_uid>20</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534945085f4849440c41d00c0f085f5549440a14085f435253110e0a0b8906000901140000007900</aml_template>
|
|
<resource id="res0" type="irq" int="20"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIF</acpi_object>
|
|
<acpi_uid>21</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534946085f4849440c41d00c0f085f5549440a15085f435253110e0a0b8906000901150000007900</aml_template>
|
|
<resource id="res0" type="irq" int="21"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIG</acpi_object>
|
|
<acpi_uid>22</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534947085f4849440c41d00c0f085f5549440a16085f435253110e0a0b8906000901160000007900</aml_template>
|
|
<resource id="res0" type="irq" int="22"/>
|
|
</device>
|
|
<device id="PNP0C0F">
|
|
<acpi_object>\_SB_.GSIH</acpi_object>
|
|
<acpi_uid>23</acpi_uid>
|
|
<aml_template>5b82305c2e5f53425f47534948085f4849440c41d00c0f085f5549440a17085f435253110e0a0b8906000901170000007900</aml_template>
|
|
<resource id="res0" type="irq" int="23"/>
|
|
</device>
|
|
<device id="PNP0103">
|
|
<acpi_object>\_SB_.HPET</acpi_object>
|
|
<acpi_uid>0</acpi_uid>
|
|
<aml_template>5b824b085c2e5f53425f485045545b804850544d000c0000d0fe0b00045b81104850544d1356454e44205052445f2014365f535441007056454e4460705052445f617a600a1060a00c9193600093600bffffa400a00e9193610094610c00e1f505a400a40a0f085f4849440c41d00103085f55494400085f43525311110a0e860900000000d0fe000400007900</aml_template>
|
|
<status>
|
|
<present>y</present>
|
|
<enabled>y</enabled>
|
|
<functioning>y</functioning>
|
|
</status>
|
|
<resource id="res0" type="memory" min="0xfed00000" max="0xfed003ff" len="0x400"/>
|
|
</device>
|
|
</bus>
|
|
</devices>
|
|
</acrn-config>
|