acrn-hypervisor/hypervisor/include/arch/x86
Li Fei1 ae4fa40adc hv: vpci: hv: vpci: refine pci device assignment logic
Now Host Bridge and PCI Bridge could only be added to SOS's acrn_vm_pci_dev_config.
So For UOS, we always emualte Host Bridge and PCI Bridge for it and assign PCI device
to it; for SOS, if it's the highest severity VM, we will assign Host Bridge and PCI
Bridge to it directly, otherwise, we will emulate them same as UOS.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-06-03 22:00:43 +08:00
..
boot hv: fixup relocation delta for symbols belong to entry section 2020-03-06 08:27:46 +08:00
guest hv: vpci: hv: vpci: refine pci device assignment logic 2020-06-03 22:00:43 +08:00
lib hv: Add a helper to account bitmap weight 2019-09-24 11:58:45 +08:00
apicreg.h hv: vioapic: minor refine about vioapic_init 2020-04-24 15:35:38 +08:00
board.h HV: move create_sos_vm_e820 to ve820.c 2020-03-12 14:56:34 +08:00
cpu.h hv: replace vcpu_affinity array with cpu_affinity_bitmap 2020-04-23 09:38:54 +08:00
cpu_caps.h HV: enumerate capability of #AC for Splitlock Access 2020-04-17 09:53:59 +08:00
cpufeatures.h HV: enumerate capability of #AC for Splitlock Access 2020-04-17 09:53:59 +08:00
cpuid.h hv: cpuid: remove cpuid() 2020-03-25 13:26:58 +08:00
default_acpi_info.h hv: emulate ACPI reset register for Service OS guest 2019-05-15 11:20:12 +08:00
e820.h hv: Reserve space for VMs' EPT 4k pages after boot 2020-04-01 21:13:37 +08:00
gdt.h hv: coding style: remove no real declaration for external variable 2018-12-20 20:20:08 +08:00
host_pm.h pm: S5: update the system shutdown logical in ACRN 2019-12-23 15:15:09 +08:00
idt.h hv: irq: minor refine about structure idt_64_descriptor 2020-04-26 10:48:49 +08:00
init.h HV: Add prefix 'p' before 'cpu' to physical cpu related functions 2019-04-24 10:50:28 +08:00
io.h hv:modulization for IO Emulation 2019-01-21 13:49:54 +08:00
ioapic.h hv: vioapic init for SOS VM on platforms with multiple IO-APICs 2020-03-25 09:36:18 +08:00
irq.h hv: replace vcpu_affinity array with cpu_affinity_bitmap 2020-04-23 09:38:54 +08:00
lapic.h HV: Fix MP Init sequence hang by adding a delay 2020-05-27 13:34:59 +08:00
mmu.h HV: correct ept page array usage 2020-03-12 14:56:34 +08:00
msr.h HV: enable #AC for Splitlock Access 2020-04-17 09:53:59 +08:00
page.h hv: Reserve space for VMs' EPT 4k pages after boot 2020-04-01 21:13:37 +08:00
pci_dev.h hv: pci: check whether a PCI device is host bridge or not by class 2020-06-03 22:00:43 +08:00
per_cpu.h hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs 2020-04-15 13:47:22 +08:00
pgtable.h hv: iommu: remove snoop related code 2020-04-16 08:40:17 +08:00
platform_caps.h hv: add function to check if using posted interrupt is possible for vm 2020-04-15 13:47:22 +08:00
rdt.h HV: RDT: add CDP support in ACRN 2020-05-08 08:50:13 +08:00
security.h hv: ept: apply MCE on page size change mitigation conditionally 2019-12-03 09:17:04 +08:00
seed.h hv: seed: refine header file 2019-03-15 14:09:56 +08:00
sgx.h hv: sgx: add basic support to init sgx resource for vm 2019-05-29 11:24:13 +08:00
timer.h hv: vpci: revert do FLR and BAR restore 2019-12-30 13:43:07 +08:00
trampoline.h hv:Move severl variable declaration for boot code 2019-01-25 21:32:21 +08:00
vm_config.h hv: pci: check whether a PCI device is host bridge or not by class 2020-06-03 22:00:43 +08:00
vmx.h hv: extend struct pi_desc to support VT-d posted interrupts 2020-03-31 10:30:30 +08:00
vtd.h hv: vtd: cleanup snoop control related code 2020-05-27 11:27:42 +08:00
zeropage.h HV: init efi info with multiboot2 2020-02-26 09:24:16 +08:00