114 lines
3.1 KiB
C
114 lines
3.1 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_IRQ_H
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#define ARCH_IRQ_H
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#include <common/irq.h>
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/* vectors for normal, usually for devices */
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#define VECTOR_FOR_NOR_LOWPRI_START 0x20U
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#define VECTOR_FOR_NOR_LOWPRI_END 0x7FU
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#define VECTOR_FOR_NOR_HIGHPRI_START 0x80U
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#define VECTOR_FOR_NOR_HIGHPRI_END 0xDFU
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#define VECTOR_FOR_NOR_END VECTOR_FOR_NOR_HIGHPRI_END
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#define VECTOR_FOR_INTR_START VECTOR_FOR_NOR_LOWPRI_START
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/* vectors for priority, usually for HV service */
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#define VECTOR_FOR_PRI_START 0xE0U
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#define VECTOR_FOR_PRI_END 0xFFU
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#define VECTOR_TIMER 0xEFU
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#define VECTOR_NOTIFY_VCPU 0xF0U
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#define VECTOR_VIRT_IRQ_VHM 0xF7U
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#define VECTOR_SPURIOUS 0xFFU
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#define NR_MAX_VECTOR 0xFFU
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#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
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#define NR_MAX_IRQS (256U + 16U)
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#define IRQ_INVALID (NR_MAX_IRQS + 1U)
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#define DEFAULT_DEST_MODE IOAPIC_RTE_DESTLOG
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#define DEFAULT_DELIVERY_MODE IOAPIC_RTE_DELLOPRI
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#define ALL_CPUS_MASK ((1U << phys_cpu_num) - 1U)
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/*
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* Definition of the stack frame layout
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*/
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struct intr_excp_ctx {
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uint64_t r12;
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uint64_t r13;
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uint64_t r14;
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uint64_t r15;
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uint64_t rbx;
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uint64_t rbp;
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uint64_t rax;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t r8;
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uint64_t r9;
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uint64_t r10;
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uint64_t r11;
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uint64_t vector;
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uint64_t error_code;
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uint64_t rip;
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uint64_t cs;
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uint64_t rflags;
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uint64_t rsp;
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uint64_t ss;
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};
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int handle_level_interrupt_common(struct irq_desc *desc, void *handler_data);
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int common_handler_edge(struct irq_desc *desc, void *handler_data);
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int common_dev_handler_level(struct irq_desc *desc, void *handler_data);
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int quick_handler_nolock(struct irq_desc *desc, void *handler_data);
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int init_default_irqs(uint16_t cpu);
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void dispatch_interrupt(struct intr_excp_ctx *ctx);
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void get_cpu_interrupt_info(char *str, int str_max);
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void setup_notification(void);
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typedef void (*spurious_handler_t)(uint32_t vector);
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extern spurious_handler_t spurious_handler;
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/*
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* Some MSI message definitions
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*/
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#define MSI_ADDR_MASK 0xfff00000U
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#define MSI_ADDR_BASE 0xfee00000U
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#define MSI_ADDR_RH 0x00000008U /* Redirection Hint */
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#define MSI_ADDR_LOG 0x00000004U /* Destination Mode */
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/* RFLAGS */
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#define HV_ARCH_VCPU_RFLAGS_IF (1U<<9)
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/* Interruptability State info */
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#define HV_ARCH_VCPU_BLOCKED_BY_MOVSS (1U<<1)
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#define HV_ARCH_VCPU_BLOCKED_BY_STI (1U<<0)
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void vcpu_inject_extint(struct vcpu *vcpu);
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void vcpu_inject_nmi(struct vcpu *vcpu);
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int vcpu_inject_gp(struct vcpu *vcpu, uint32_t err_code);
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int vcpu_inject_pf(struct vcpu *vcpu, uint64_t addr, uint32_t err_code);
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void vcpu_make_request(struct vcpu *vcpu, int eventid);
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int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector, uint32_t err_code);
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int exception_vmexit_handler(struct vcpu *vcpu);
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int interrupt_window_vmexit_handler(struct vcpu *vcpu);
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int external_interrupt_vmexit_handler(struct vcpu *vcpu);
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int acrn_handle_pending_request(struct vcpu *vcpu);
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int interrupt_init(uint32_t logical_id);
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void cancel_event_injection(struct vcpu *vcpu);
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#endif /* ARCH_IRQ_H */
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