Qian Wang 0267cc4ef1 HV: Fix SR-IOV problem on EHL ... hv: vpci: Add 0x45, which is the high-byte of device id of EHL, to the enumeration array in vhostbridge.c. This is to fix the problem that PCIe extended capabilities like SR-IOV cannot be used on EHL. Tracked-On: #5256 Signed-off-by: Qian Wang <qian1.wang@intel.com>		2020-09-08 08:44:56 +08:00
..
ivshmem.c	hv: implement ivshmem device creation and destruction	2020-08-28 16:53:12 +08:00
pci_pt.c	hv: code cleanup for vBAR writing	2020-08-19 15:06:15 +08:00
vdev.c	HV: refine pci_find_vdev with hash	2020-06-18 12:58:40 +08:00
vhostbridge.c	HV: Fix SR-IOV problem on EHL	2020-09-08 08:44:56 +08:00
vmsi.c	HV: correct RO mask of MSI cap structure	2020-08-03 13:40:27 +08:00
vmsix.c	hv: vpci: minor refine about MSI/MSI-X de-initialization	2020-07-02 13:03:36 +08:00
vmsix_on_msi.c	hv: vmsi: add vmsix on msi emulation support	2020-06-16 08:52:56 +08:00
vpci.c	hv: support PIO access to platform hidden devices	2020-09-07 14:08:40 +08:00
vpci_bridge.c	hv: vpci: minor refine the vdev ownership data structure	2020-05-13 14:31:01 +08:00
vpci_priv.h	hv: code cleanup for vBAR writing	2020-08-19 15:06:15 +08:00
vsriov.c	HV: vdev passthough hidding SRIOV	2020-07-16 17:27:18 +08:00