175 lines
5.5 KiB
C
175 lines
5.5 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef TRACE_EVENT_H
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#define TRACE_EVENT_H
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#define GEN_CASE(id) case (id):{ id##_FMT; break; }
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/* TIMER */
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#define TRACE_TIMER_ACTION_ADDED 0x1
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#define TRACE_TIMER_ACTION_PCKUP 0x2
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#define TRACE_TIMER_ACTION_UPDAT 0x3
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#define TRACE_TIMER_IRQ 0x4
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#define TRACE_VM_EXIT 0x10
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#define TRACE_VM_ENTER 0X11
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#define TRC_VMEXIT_ENTRY 0x10000
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#define TRC_VMEXIT_EXCEPTION_OR_NMI (TRC_VMEXIT_ENTRY + 0x00000000)
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#define TRC_VMEXIT_EXTERNAL_INTERRUPT (TRC_VMEXIT_ENTRY + 0x00000001)
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#define TRC_VMEXIT_INTERRUPT_WINDOW (TRC_VMEXIT_ENTRY + 0x00000002)
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#define TRC_VMEXIT_CPUID (TRC_VMEXIT_ENTRY + 0x00000004)
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#define TRC_VMEXIT_RDTSC (TRC_VMEXIT_ENTRY + 0x00000010)
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#define TRC_VMEXIT_VMCALL (TRC_VMEXIT_ENTRY + 0x00000012)
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#define TRC_VMEXIT_CR_ACCESS (TRC_VMEXIT_ENTRY + 0x0000001C)
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#define TRC_VMEXIT_IO_INSTRUCTION (TRC_VMEXIT_ENTRY + 0x0000001E)
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#define TRC_VMEXIT_RDMSR (TRC_VMEXIT_ENTRY + 0x0000001F)
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#define TRC_VMEXIT_WRMSR (TRC_VMEXIT_ENTRY + 0x00000020)
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#define TRC_VMEXIT_EPT_VIOLATION (TRC_VMEXIT_ENTRY + 0x00000030)
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#define TRC_VMEXIT_EPT_MISCONFIGURATION (TRC_VMEXIT_ENTRY + 0x00000031)
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#define TRC_VMEXIT_RDTSCP (TRC_VMEXIT_ENTRY + 0x00000033)
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#define TRC_VMEXIT_APICV_WRITE (TRC_VMEXIT_ENTRY + 0x00000038)
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#define TRC_VMEXIT_APICV_ACCESS (TRC_VMEXIT_ENTRY + 0x00000039)
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#define TRC_VMEXIT_APICV_VIRT_EOI (TRC_VMEXIT_ENTRY + 0x0000003A)
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#define TRC_VMEXIT_UNHANDLED 0x20000
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#define TRACE_CUSTOM 0xFC
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#define TRACE_FUNC_ENTER 0xFD
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#define TRACE_FUNC_EXIT 0xFE
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#define TRACE_STR 0xFF
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/* TRACE_EVENTID_MAX 256 */
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#define PR(fmt, ...) fprintf((fp), fmt, ##__VA_ARGS__);
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#define TRACE_TIMER_ACTION_ADDED_FMT \
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{PR("TIMER_ACTION ADDED: ID %d, deadline %lx total %d\n", \
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(e).a, ((uint64_t)((e).c)<<32)|(e).b, (e).d); }
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#define TRACE_TIMER_ACTION_PCKUP_FMT \
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{PR("TIMER_ACTION PCKUP: ID %d, deadline %lx total %d\n", \
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(e).a, ((uint64_t)((e).c)<<32)|(e).b, (e).d); }
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#define TRACE_TIMER_ACTION_UPDAT_FMT \
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{PR("TIMER_ACTION UPDAT: ID %d, deadline %lx total %d\n", \
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(e).a, ((unsigned long)((e).c)<<32)|(e).b, (e).d); }
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#define TRACE_TIMER_IRQ_FMT \
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PR("TIMER_IRQ total: %lx\n", (e).e)
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#define TRACE_CUSTOM_FMT \
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PR("CUSTOM: 0x%lx 0x%lx\n", (e).e, (e).f)
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#define TRACE_FUNC_ENTER_FMT \
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PR("ENTER: %s\n", (e).str)
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#define TRACE_FUNC_EXIT_FMT \
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PR("EXIT : %s\n", (e).str)
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#define TRACE_STR_FMT \
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PR("STR: %s\n", (e).str)
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#define TRACE_VM_EXIT_FMT \
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PR("VM_EXIT: exit_reason 0x%016lx, guest_rip 0x%016lx\n", \
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(e).e, (e).f)
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#define TRACE_VM_ENTER_FMT \
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PR("VM_ENTER:\n")
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#define TRC_VMEXIT_EXCEPTION_OR_NMI_FMT \
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PR("VMEXIT_EXCEPTION_OR_NMI: \
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vec 0x%08x, err_code 0x%08x, type %d\n", \
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(e).a, (e).b, (e).c)
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#define TRC_VMEXIT_EXTERNAL_INTERRUPT_FMT \
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PR("VMEXIT_EXTERNAL_INTERRUPT: vec 0x%08lx\n", (e).e)
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#define TRC_VMEXIT_INTERRUPT_WINDOW_FMT \
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PR("VMEXIT_INTERRUPT_WINDOW:\n")
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#define TRC_VMEXIT_CPUID_FMT \
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PR("VMEXIT_CPUID: vcpuid %lu\n", (e).e)
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#define TRC_VMEXIT_RDTSC_FMT \
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PR("VMEXIT_RDTSC: host_tsc 0x%016lx, tsc_offset 0x%016lx\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_VMCALL_FMT \
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PR("VMEXIT_VMCALL: vmid %lu, hypercall_id %lu\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_CR_ACCESS_FMT \
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PR("VMEXIT_CR_ACCESS: op %s, rn_nr %lu\n", \
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(e).e?"Read":"Write", (e).f)
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#define TRC_VMEXIT_IO_INSTRUCTION_FMT \
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PR("VMEXIT_IO_INSTRUCTION: \
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port %u, dir %u, sz %u, cur_ctx_idx %u\n", \
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(e).a, (e).b, (e).c, (e).d)
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#define TRC_VMEXIT_RDMSR_FMT \
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PR("VMEXIT_RDMSR: msr 0x%08lx, val 0x%08lx\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_WRMSR_FMT \
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PR("VMEXIT_WRMSR: msr 0x%08lx, val 0x%08lx\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_EPT_VIOLATION_FMT \
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PR("VMEXIT_EPT_VIOLATION: qual 0x%016lx, gpa 0x%016lx\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_EPT_MISCONFIGURATION_FMT \
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PR("VMEXIT_EPT_MISCONFIGURATION:\n")
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#define TRC_VMEXIT_RDTSCP_FMT \
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PR("VMEXIT_RDTSCP: guest_tsc 0x%lx, tsc_aux 0x%lx\n", \
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(e).e, (e).f)
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#define TRC_VMEXIT_APICV_WRITE_FMT \
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PR("VMEXIT_APICV_WRITE: offset 0x%lx\n", (e).e)
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#define TRC_VMEXIT_APICV_ACCESS_FMT \
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PR("VMEXIT_APICV_ACCESS:\n")
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#define TRC_VMEXIT_APICV_VIRT_EOI_FMT \
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PR("VMEXIT_APICV_VIRT_EOI: vec 0x%08lx\n", (e).e)
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#define TRC_VMEXIT_UNHANDLED_FMT \
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PR("VMEXIT_UNHANDLED: 0x%08lx\n", (e).e)
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#define ALL_CASES \
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GEN_CASE(TRACE_TIMER_ACTION_ADDED); \
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GEN_CASE(TRACE_TIMER_ACTION_PCKUP); \
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GEN_CASE(TRACE_TIMER_ACTION_UPDAT); \
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GEN_CASE(TRACE_TIMER_IRQ); \
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GEN_CASE(TRACE_CUSTOM); \
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GEN_CASE(TRACE_STR); \
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GEN_CASE(TRACE_FUNC_ENTER); \
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GEN_CASE(TRACE_FUNC_EXIT); \
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GEN_CASE(TRACE_VM_EXIT); \
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GEN_CASE(TRACE_VM_ENTER); \
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GEN_CASE(TRC_VMEXIT_EXCEPTION_OR_NMI); \
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GEN_CASE(TRC_VMEXIT_EXTERNAL_INTERRUPT);\
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GEN_CASE(TRC_VMEXIT_INTERRUPT_WINDOW); \
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GEN_CASE(TRC_VMEXIT_CPUID); \
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GEN_CASE(TRC_VMEXIT_RDTSC); \
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GEN_CASE(TRC_VMEXIT_VMCALL); \
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GEN_CASE(TRC_VMEXIT_CR_ACCESS); \
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GEN_CASE(TRC_VMEXIT_IO_INSTRUCTION); \
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GEN_CASE(TRC_VMEXIT_RDMSR); \
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GEN_CASE(TRC_VMEXIT_WRMSR); \
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GEN_CASE(TRC_VMEXIT_EPT_VIOLATION); \
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GEN_CASE(TRC_VMEXIT_EPT_MISCONFIGURATION);\
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GEN_CASE(TRC_VMEXIT_RDTSCP); \
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GEN_CASE(TRC_VMEXIT_APICV_WRITE); \
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GEN_CASE(TRC_VMEXIT_APICV_ACCESS); \
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GEN_CASE(TRC_VMEXIT_APICV_VIRT_EOI); \
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GEN_CASE(TRC_VMEXIT_UNHANDLED); \
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#endif /* TRACE_EVENT_H */
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