106 lines
3.5 KiB
Python
106 lines
3.5 KiB
Python
# Copyright (C) 2020 Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import common
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import board_cfg_lib
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import scenario_cfg_lib
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BOARD_INFO_DEFINE="""#ifndef BOARD_INFO_H
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#define BOARD_INFO_H
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"""
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BOARD_INFO_ENDIF="""
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#endif /* BOARD_INFO_H */"""
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def gen_known_caps_pci_head(config):
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bdf_list_len = 0
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known_caps_pci_devs = board_cfg_lib.get_known_caps_pci_devs()
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for dev,bdf_list in known_caps_pci_devs.items():
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if dev == "VMSIX":
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bdf_list_len = len(bdf_list)
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print("#define MAX_VMSIX_ON_MSI_PDEVS_NUM\t{}U".format(bdf_list_len), file=config)
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def find_hi_mmio_window(config):
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i_cnt = 0
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mmio_min = 0
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mmio_max = 0
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is_hi_mmio = False
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iomem_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<IOMEM_INFO>", "</IOMEM_INFO>")
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for line in iomem_lines:
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if "PCI Bus" not in line:
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continue
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line_start_addr = int(line.split('-')[0], 16)
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line_end_addr = int(line.split('-')[1].split()[0], 16)
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if line_start_addr < common.SIZE_4G and line_end_addr < common.SIZE_4G:
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continue
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elif line_start_addr < common.SIZE_4G and line_end_addr >= common.SIZE_4G:
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i_cnt += 1
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is_hi_mmio = True
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mmio_min = common.SIZE_4G
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mmio_max = line_end_addr
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continue
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is_hi_mmio = True
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if i_cnt == 0:
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mmio_min = line_start_addr
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mmio_max = line_end_addr
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if mmio_max < line_end_addr:
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mmio_max = line_end_addr
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i_cnt += 1
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print("", file=config)
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if is_hi_mmio:
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print("#define HI_MMIO_START\t\t\t0x%xUL" % common.round_down(mmio_min, common.SIZE_G), file=config)
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print("#define HI_MMIO_END\t\t\t0x%xUL" % common.round_up(mmio_max, common.SIZE_G), file=config)
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else:
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print("#define HI_MMIO_START\t\t\t~0UL", file=config)
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print("#define HI_MMIO_END\t\t\t0UL", file=config)
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print("#define HI_MMIO_SIZE\t\t\t{}UL".format(hex(board_cfg_lib.HI_MMIO_OFFSET)), file=config)
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def generate_file(config):
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# get cpu processor list
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cpu_list = board_cfg_lib.get_processor_info()
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max_cpu_num = len(cpu_list)
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# start to generate board_info.h
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print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
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print(BOARD_INFO_DEFINE, file=config)
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# define CONFIG_MAX_PCPCU_NUM
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print("#define MAX_PCPU_NUM\t\t\t{}U".format(max_cpu_num), file=config)
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# define MAX_VMSIX_ON_MSI_PDEVS_NUM
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gen_known_caps_pci_head(config)
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# define MAX_HIDDEN_PDEVS_NUM
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if board_cfg_lib.BOARD_NAME in list(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB):
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print("#define MAX_HIDDEN_PDEVS_NUM\t\t{}U".format(len(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[board_cfg_lib.BOARD_NAME])), file=config)
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else:
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print("#define MAX_HIDDEN_PDEVS_NUM\t\t0U", file=config)
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# generate HI_MMIO_START/HI_MMIO_END
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find_hi_mmio_window(config)
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if (common.VM_TYPES.get(0) is not None and
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scenario_cfg_lib.VM_DB[common.VM_TYPES[0]]['load_type'] == "PRE_LAUNCHED_VM"
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and board_cfg_lib.is_p2sb_passthru_possible()):
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print("", file=config)
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print("#define P2SB_BAR_ADDR\t\t\t0x{:X}UL".format(board_cfg_lib.find_p2sb_bar_addr()), file=config)
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if board_cfg_lib.is_matched_board(("ehl-crb-b")):
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print("", file=config)
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print("#define BASE_GPIO_PORT_ID\t\t0x69U", file=config)
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print("#define MAX_GPIO_COMMUNITIES\t0x6U", file=config)
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print(BOARD_INFO_ENDIF, file=config)
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