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acrn-hypervisor
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Li Fei1 1e50ec8899 hv: pci: use ECAM to access PCIe Configuration Space 
Use Enhanced Configuration Access Mechanism (MMIO) instead of PCI-compatible
Configuration Mechanism (IO port) to access  PCIe Configuration Space
PCI-compatible Configuration Mechanism (IO port) access is used for UART in
debug version.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
 		2020-01-07 16:05:30 +08:00
..
Makefile hv:fix a bug for building debug/release lib 2019-06-26 15:22:57 +08:00
console.c hv:fix "no prototype for non-static function" 2019-07-09 10:36:03 +08:00
dump.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
hypercall.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
logmsg.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
npk_log.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
profiling.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
sbuf.c hv: bugfix for sbuf reset 2019-06-27 15:40:19 +08:00
trace.c hv:cleanup header files for release folder 2019-02-28 12:52:36 +08:00
uart16550.c hv: pci: use ECAM to access PCIe Configuration Space 2020-01-07 16:05:30 +08:00