125 lines
3.9 KiB
C
125 lines
3.9 KiB
C
/*
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* Copyright (C) 2018-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _ATOMIC_H_
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#define _ATOMIC_H_
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/* Test for GCC >= 4.7.0 */
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#if ((__GNUC__ > 4) || (__GNUC__ == 4 && (__GNUC_MINOR__ >= 7)))
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/* Since GCC 4.7.0, the __atomic builtins are introduced as a replacement of the
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* __sync ones. The original __sync builtins maps to their __atomic counter-part
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* using the __ATOMIC_SEQ_CST model and will be eventually deprecated. */
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#define atomic_load(ptr) \
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__atomic_load_n(ptr, __ATOMIC_SEQ_CST)
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#define atomic_store(ptr, val) \
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__atomic_store_n(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_xchg(ptr, val) \
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__atomic_exchange_n(ptr, val, __ATOMIC_SEQ_CST)
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/* Note: expected should also be a pointer. */
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#define atomic_cmpxchg(ptr, expected, desired) \
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__atomic_compare_exchange_n(ptr, expected, desired, \
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false, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE)
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#define atomic_add_fetch(ptr, val) \
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__atomic_add_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_sub_fetch(ptr, val) \
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__atomic_sub_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_and_fetch(ptr, val) \
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__atomic_and_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_xor_fetch(ptr, val) \
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__atomic_xor_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_or_fetch(ptr, val) \
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__atomic_or_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_nand_fetch(ptr, val) \
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__atomic_nand_fetch(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_add(ptr, val) \
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__atomic_fetch_add(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_sub(ptr, val) \
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__atomic_fetch_sub(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_and(ptr, val) \
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__atomic_fetch_and(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_xor(ptr, val) \
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__atomic_fetch_xor(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_or(ptr, val) \
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__atomic_fetch_or(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_fetch_nand(ptr, val) \
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__atomic_fetch_nand(ptr, val, __ATOMIC_SEQ_CST)
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#define atomic_test_and_set(ptr) \
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__atomic_test_and_set(ptr, __ATOMIC_SEQ_CST)
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#define atomic_clear(ptr) \
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__atomic_clear(ptr, __ATOMIC_SEQ_CST)
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#define atomic_thread_fence() \
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__atomic_thread_fence(__ATOMIC_SEQ_CST)
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#define atomic_signal_fence() \
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__atomic_signal_fence(__ATOMIC_SEQ_CST)
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#else /* not GCC >= 4.7.0 */
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/* __sync builtins do not have load/store interfaces. Use add_fetch and xchg to
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* mimic their functinality.
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*
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* Also note that __sync_lock_test_and_set is rather an atomic exchange
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* operation per GCC manual on the __sync builtins.
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*/
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#define atomic_load(ptr) \
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__sync_add_and_fetch(ptr, 0)
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#define atomic_store(ptr, val) \
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(void)(__sync_lock_test_and_set(ptr, val))
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#define atomic_xchg(ptr, val) \
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__sync_lock_test_and_set(ptr, val)
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/* Note: expected should also be a pointer. */
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#define atomic_cmpxchg(ptr, expected, desired) \
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__sync_bool_compare_and_swap(ptr, (*(expected)), desired)
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#define atomic_add_fetch(ptr, val) \
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__sync_add_and_fetch(ptr, val)
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#define atomic_sub_fetch(ptr, val) \
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__sync_sub_and_fetch(ptr, val)
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#define atomic_and_fetch(ptr, val) \
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__sync_and_and_fetch(ptr, val)
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#define atomic_xor_fetch(ptr, val) \
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__sync_xor_and_fetch(ptr, val)
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#define atomic_or_fetch(ptr, val) \
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__sync_or_and_fetch(ptr, val)
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#define atomic_nand_fetch(ptr, val) \
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__sync_nand_and_fetch(ptr, val)
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#define atomic_fetch_add(ptr, val) \
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__sync_fetch_and_add(ptr, val)
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#define atomic_fetch_sub(ptr, val) \
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__sync_fetch_and_sub(ptr, val)
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#define atomic_fetch_and(ptr, val) \
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__sync_fetch_and_and(ptr, val)
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#define atomic_fetch_xor(ptr, val) \
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__sync_fetch_and_xor(ptr, val)
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#define atomic_fetch_or(ptr, val) \
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__sync_fetch_and_or(ptr, val)
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#define atomic_fetch_nand(ptr, val) \
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__sync_fetch_and_nand(ptr, val)
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#define atomic_test_and_set(ptr) \
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(bool)(__sync_lock_test_and_set(ptr, 1))
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#define atomic_clear(ptr) \
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__sync_lock_release(ptr)
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#define atomic_thread_fence() \
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__sync_synchronize()
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#define atomic_signal_fence() \
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__sync_synchronize()
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#endif /* GCC >= 4.7.0 */
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#endif /* _ATOMIC_H_ */
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