121 lines
3.4 KiB
C
121 lines
3.4 KiB
C
/*-
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* Copyright (c) 2015 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _ATKBDC_H_
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#define _ATKBDC_H_
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#define KBD_DATA_PORT 0x60
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#define KBD_STS_CTL_PORT 0x64
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#define KBDC_RESET 0xfe
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#define KBD_DEV_IRQ 1
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#define AUX_DEV_IRQ 12
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/* controller commands */
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#define KBDC_SET_COMMAND_BYTE 0x60
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#define KBDC_GET_COMMAND_BYTE 0x20
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#define KBDC_DISABLE_AUX_PORT 0xa7
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#define KBDC_ENABLE_AUX_PORT 0xa8
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#define KBDC_TEST_AUX_PORT 0xa9
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#define KBDC_TEST_CTRL 0xaa
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#define KBDC_TEST_KBD_PORT 0xab
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#define KBDC_DISABLE_KBD_PORT 0xad
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#define KBDC_ENABLE_KBD_PORT 0xae
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#define KBDC_READ_INPORT 0xc0
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#define KBDC_READ_OUTPORT 0xd0
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#define KBDC_WRITE_OUTPORT 0xd1
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#define KBDC_WRITE_KBD_OUTBUF 0xd2
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#define KBDC_WRITE_AUX_OUTBUF 0xd3
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#define KBDC_WRITE_TO_AUX 0xd4
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/* controller command byte (set by KBDC_SET_COMMAND_BYTE) */
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#define KBD_TRANSLATION 0x40
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#define KBD_SYS_FLAG_BIT 0x04
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#define KBD_DISABLE_KBD_PORT 0x10
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#define KBD_DISABLE_AUX_PORT 0x20
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#define KBD_ENABLE_AUX_INT 0x02
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#define KBD_ENABLE_KBD_INT 0x01
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#define KBD_KBD_CONTROL_BITS (KBD_DISABLE_KBD_PORT | KBD_ENABLE_KBD_INT)
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#define KBD_AUX_CONTROL_BITS (KBD_DISABLE_AUX_PORT | KBD_ENABLE_AUX_INT)
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/* controller status bits */
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#define KBDS_KBD_BUFFER_FULL 0x01
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#define KBDS_SYS_FLAG 0x04
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#define KBDS_CTRL_FLAG 0x08
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#define KBDS_AUX_BUFFER_FULL 0x20
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/* controller output port */
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#define KBDO_KBD_OUTFULL 0x10
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#define KBDO_AUX_OUTFULL 0x20
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#define RAMSZ 32
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#define FIFOSZ 15
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#define CTRL_CMD_FLAG 0x8000
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struct vmctx;
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struct kbd_dev {
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bool irq_active;
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int irq;
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uint8_t buffer[FIFOSZ];
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int brd, bwr;
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int bcnt;
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};
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struct aux_dev {
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bool irq_active;
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int irq;
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};
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struct atkbdc_base {
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struct vmctx *ctx;
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pthread_mutex_t mtx;
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struct ps2kbd_info *ps2kbd;
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struct ps2mouse_info *ps2mouse;
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uint8_t status; /* status register */
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uint8_t outport; /* controller output port */
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uint8_t ram[RAMSZ]; /* byte0 = controller config */
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uint32_t curcmd; /* current command for next byte */
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uint32_t ctrlbyte;
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struct kbd_dev kbd;
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struct aux_dev aux;
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};
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void atkbdc_init(struct vmctx *ctx);
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void atkbdc_deinit(struct vmctx *ctx);
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void atkbdc_event(struct atkbdc_base *base, int iskbd);
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#endif /* _ATKBDC_H_ */
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