82 lines
2.9 KiB
C
82 lines
2.9 KiB
C
/*-
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* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VUART_H
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#define VUART_H
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#define RX_BUF_SIZE 256U
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#define TX_BUF_SIZE 8192U
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struct fifo {
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char *buf;
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uint32_t rindex; /* index to read from */
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uint32_t windex; /* index to write to */
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uint32_t num; /* number of characters in the fifo */
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uint32_t size; /* size of the fifo */
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};
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struct acrn_vuart {
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uint8_t data; /* Data register (R/W) */
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uint8_t ier; /* Interrupt enable register (R/W) */
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uint8_t lcr; /* Line control register (R/W) */
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uint8_t mcr; /* Modem control register (R/W) */
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uint8_t lsr; /* Line status register (R/W) */
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uint8_t msr; /* Modem status register (R/W) */
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uint8_t fcr; /* FIFO control register (W) */
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uint8_t scr; /* Scratch register (R/W) */
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uint8_t dll; /* Baudrate divisor latch LSB */
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uint8_t dlh; /* Baudrate divisor latch MSB */
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struct fifo rxfifo;
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struct fifo txfifo;
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uint16_t base;
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#ifdef CONFIG_PARTITION_MODE
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char vuart_rx_buf[RX_BUF_SIZE];
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char vuart_tx_buf[TX_BUF_SIZE];
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#endif
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bool thre_int_pending; /* THRE interrupt pending */
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bool active;
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struct acrn_vm *vm;
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spinlock_t lock; /* protects all softc elements */
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};
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#ifdef CONFIG_PARTITION_MODE
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extern int8_t vuart_vmid;
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#endif /* CONFIG_PARTITION_MODE */
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struct acrn_vuart *vm_vuart(struct acrn_vm *vm);
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void vuart_init(struct acrn_vm *vm);
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struct acrn_vuart *vuart_console_active(void);
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void vuart_console_tx_chars(struct acrn_vuart *vu);
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void vuart_console_rx_chars(struct acrn_vuart *vu);
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bool hv_used_dbg_intx(uint32_t intx_pin);
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void vuart_set_property(const char *vuart_info);
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#endif /* VUART_H */
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