93 lines
3.2 KiB
C
93 lines
3.2 KiB
C
/*-
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* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VUART_H
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#define VUART_H
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#include <types.h>
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#include <spinlock.h>
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#include <vm_config.h>
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#define RX_BUF_SIZE 256U
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#define TX_BUF_SIZE 8192U
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#define INVAILD_VUART_IDX 0xFFU
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#define COM1_BASE 0x3F8U
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#define COM2_BASE 0x2F8U
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#define COM3_BASE 0x3E8U
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#define COM4_BASE 0x2E8U
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#define INVALID_COM_BASE 0U
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#define COM1_IRQ 4U
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#define COM2_IRQ 3U
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#define COM3_IRQ 6U
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#define COM4_IRQ 7U
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struct vuart_fifo {
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char *buf;
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uint32_t rindex; /* index to read from */
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uint32_t windex; /* index to write to */
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uint32_t num; /* number of characters in the fifo */
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uint32_t size; /* size of the fifo */
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};
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struct acrn_vuart {
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uint8_t data; /* Data register (R/W) */
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uint8_t ier; /* Interrupt enable register (R/W) */
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uint8_t lcr; /* Line control register (R/W) */
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uint8_t mcr; /* Modem control register (R/W) */
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uint8_t lsr; /* Line status register (R/W) */
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uint8_t msr; /* Modem status register (R/W) */
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uint8_t fcr; /* FIFO control register (W) */
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uint8_t scr; /* Scratch register (R/W) */
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uint8_t dll; /* Baudrate divisor latch LSB */
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uint8_t dlh; /* Baudrate divisor latch MSB */
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struct vuart_fifo rxfifo;
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struct vuart_fifo txfifo;
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uint16_t port_base;
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uint32_t irq;
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char vuart_rx_buf[RX_BUF_SIZE];
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char vuart_tx_buf[TX_BUF_SIZE];
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bool thre_int_pending; /* THRE interrupt pending */
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bool active;
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struct acrn_vuart *target_vu; /* Pointer to target vuart */
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struct acrn_vm *vm;
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spinlock_t lock; /* protects all softc elements */
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};
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void init_vuart(struct acrn_vm *vm, const struct vuart_config *vu_config);
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void deinit_vuart(struct acrn_vm *vm);
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void vuart_putchar(struct acrn_vuart *vu, char ch);
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char vuart_getchar(struct acrn_vuart *vu);
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void vuart_toggle_intr(const struct acrn_vuart *vu);
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bool is_vuart_intx(const struct acrn_vm *vm, uint32_t intx_gsi);
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#endif /* VUART_H */
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