250 lines
6.8 KiB
C
250 lines
6.8 KiB
C
/*
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* Copyright (C) 2019-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm/guest/vm.h>
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#include <asm/io.h>
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#include <asm/host_pm.h>
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#include <logmsg.h>
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#include <asm/per_cpu.h>
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#include <asm/guest/vm_reset.h>
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/**
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* @pre vm != NULL
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*/
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void triple_fault_shutdown_vm(struct acrn_vcpu *vcpu)
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{
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struct acrn_vm *vm = vcpu->vm;
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if (is_postlaunched_vm(vm)) {
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struct io_request *io_req = &vcpu->req;
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/* Device model emulates PM1A for post-launched VMs */
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io_req->io_type = ACRN_IOREQ_TYPE_PORTIO;
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io_req->reqs.pio_request.direction = ACRN_IOREQ_DIR_WRITE;
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io_req->reqs.pio_request.address = VIRTUAL_PM1A_CNT_ADDR;
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io_req->reqs.pio_request.size = 2UL;
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io_req->reqs.pio_request.value = (VIRTUAL_PM1A_SLP_EN | (5U << 10U));
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/* Inject pm1a S5 request to Service VM to shut down the guest */
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(void)emulate_io(vcpu, io_req);
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} else {
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if (is_service_vm(vm)) {
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uint16_t vm_id;
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/* Shut down all non real time post-launched VMs */
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for (vm_id = 0U; vm_id < CONFIG_MAX_VM_NUM; vm_id++) {
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struct acrn_vm *pl_vm = get_vm_from_vmid(vm_id);
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get_vm_lock(pl_vm);
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if (!is_poweroff_vm(pl_vm) && is_postlaunched_vm(pl_vm) && !is_rt_vm(pl_vm)) {
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pause_vm(pl_vm);
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(void)shutdown_vm(pl_vm);
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}
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put_vm_lock(pl_vm);
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}
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}
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/* Either Service VM or pre-launched VMs */
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get_vm_lock(vm);
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poweroff_if_rt_vm(vm);
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pause_vm(vm);
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put_vm_lock(vm);
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bitmap_set_nolock(vm->vm_id,
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&per_cpu(shutdown_vm_bitmap, pcpuid_from_vcpu(vcpu)));
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make_shutdown_vm_request(pcpuid_from_vcpu(vcpu));
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}
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}
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/**
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* @pre vcpu != NULL
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* @pre vcpu->vm != NULL
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*/
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static bool handle_reset_reg_read(struct acrn_vcpu *vcpu, __unused uint16_t addr,
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__unused size_t bytes)
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{
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bool ret = true;
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if (is_postlaunched_vm(vcpu->vm)) {
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/* re-inject to DM */
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ret = false;
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} else {
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/*
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* - reset control register 0xcf9: hide this from guests for now.
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* - FADT reset register: the read behavior is not defined in spec, keep it simple to return all '1'.
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*/
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vcpu->req.reqs.pio_request.value = ~0U;
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}
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return ret;
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}
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/**
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* @pre vm != NULL
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*/
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static bool handle_common_reset_reg_write(struct acrn_vcpu *vcpu, bool reset)
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{
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struct acrn_vm *vm = vcpu->vm;
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bool ret = true;
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get_vm_lock(vm);
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if (reset) {
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poweroff_if_rt_vm(vm);
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if (get_highest_severity_vm(true) == vm) {
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reset_host();
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} else if (is_postlaunched_vm(vm)) {
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/* re-inject to DM */
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ret = false;
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} else {
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/*
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* If it's Service VM reset while RTVM is still alive
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* or pre-launched VM reset,
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* ACRN doesn't support re-launch, just shutdown the guest.
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*/
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pause_vm(vm);
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bitmap_set_nolock(vm->vm_id,
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&per_cpu(shutdown_vm_bitmap, pcpuid_from_vcpu(vcpu)));
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make_shutdown_vm_request(pcpuid_from_vcpu(vcpu));
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}
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} else {
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if (is_postlaunched_vm(vm)) {
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/* If post-launched VM write none reset value, re-inject to DM */
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ret = false;
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}
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/*
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* Ignore writes from Service VM and pre-launched VM.
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* Equivalent to hiding this port from the guest.
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*/
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}
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put_vm_lock(vm);
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return ret;
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}
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/**
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* @pre vcpu != NULL
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* @pre vcpu->vm != NULL
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*/
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static bool handle_kb_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t val)
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{
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/* ignore commands other than system reset */
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return handle_common_reset_reg_write(vcpu, ((bytes == 1U) && (val == 0xfeU)));
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}
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static bool handle_kb_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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{
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if (is_service_vm(vcpu->vm) && (bytes == 1U)) {
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/* In case i8042 is defined as ACPI PNP device in BIOS, HV need expose physical 0x64 port. */
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vcpu->req.reqs.pio_request.value = pio_read8(addr);
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} else {
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/* ACRN will not expose kbd controller to the guest in this case. */
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vcpu->req.reqs.pio_request.value = ~0U;
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}
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return true;
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}
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/*
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* Reset Control register at I/O port 0xcf9.
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* Bit 1 - 0: "soft" reset. Force processor begin execution at power-on reset vector.
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* 1: "hard" reset. e.g. assert PLTRST# (if implemented) to do a host reset.
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* Bit 2 - initiates a system reset when it transitions from 0 to 1.
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* Bit 3 - 1: full reset (aka code reset), SLP_S3#/4#/5# or similar pins are asserted for full power cycle.
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* 0: will be dropped if system in S3/S4/S5.
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*/
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/**
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* @pre vcpu != NULL
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* @pre vcpu->vm != NULL
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*/
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static bool handle_cf9_write(struct acrn_vcpu *vcpu, __unused uint16_t addr, size_t bytes, uint32_t val)
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{
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/* We don't differentiate among hard/soft/warm/cold reset */
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return handle_common_reset_reg_write(vcpu,
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((bytes == 1U) && ((val & 0x4U) == 0x4U) && ((val & 0xaU) != 0U)));
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}
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/**
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* @pre vcpu != NULL
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* @pre vcpu->vm != NULL
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*/
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static bool handle_reset_reg_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
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{
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bool ret = true;
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if (bytes == 1U) {
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struct acpi_reset_reg *reset_reg = get_host_reset_reg_data();
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if (val == reset_reg->val) {
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ret = handle_common_reset_reg_write(vcpu, true);
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} else {
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/*
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* ACPI defines the reset value but doesn't specify the meaning of other values.
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* in the case the reset register (e.g. PIO 0xB2) has other purpose other than reset,
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* we can't ignore the write with other values.
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*/
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pio_write8((uint8_t)val, addr);
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}
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}
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return ret;
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}
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/**
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* @pre vm != NULL
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*/
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void register_reset_port_handler(struct acrn_vm *vm)
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{
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/* Don't support Service VM and pre-launched VM re-launch for now. */
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if (!is_postlaunched_vm(vm) || is_rt_vm(vm)) {
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struct acpi_reset_reg *reset_reg = get_host_reset_reg_data();
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struct acrn_acpi_generic_address *gas = &(reset_reg->reg);
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struct vm_io_range io_range = {
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.len = 1U
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};
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io_range.base = 0x64U;
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register_pio_emulation_handler(vm, KB_PIO_IDX, &io_range, handle_kb_read, handle_kb_write);
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/* ACPI reset register is fixed at 0xcf9 for post-launched and pre-launched VMs */
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io_range.base = 0xcf9U;
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register_pio_emulation_handler(vm, CF9_PIO_IDX, &io_range, handle_reset_reg_read, handle_cf9_write);
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/*
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* - here is taking care of Service VM only:
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* Don't support MMIO or PCI based reset register for now.
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* ACPI Spec: Register_Bit_Width must be 8 and Register_Bit_Offset must be 0.
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*/
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if (is_service_vm(vm) &&
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(gas->space_id == SPACE_SYSTEM_IO) &&
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(gas->bit_width == 8U) && (gas->bit_offset == 0U) &&
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(gas->address != 0xcf9U) && (gas->address != 0x64U)) {
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io_range.base = (uint16_t)reset_reg->reg.address;
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register_pio_emulation_handler(vm, PIO_RESET_REG_IDX, &io_range,
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handle_reset_reg_read, handle_reset_reg_write);
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}
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}
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}
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void shutdown_vm_from_idle(uint16_t pcpu_id)
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{
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uint16_t vm_id;
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uint64_t *vms = &per_cpu(shutdown_vm_bitmap, pcpu_id);
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struct acrn_vm *vm;
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for (vm_id = fls64(*vms); vm_id < CONFIG_MAX_VM_NUM; vm_id = fls64(*vms)) {
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vm = get_vm_from_vmid(vm_id);
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get_vm_lock(vm);
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if (is_paused_vm(vm)) {
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(void)shutdown_vm(vm);
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}
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put_vm_lock(vm);
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bitmap_clear_nolock(vm_id, vms);
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}
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}
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