acrn-hypervisor/hypervisor/include
Minggui Cao b3bd153180 hv: expose PEBS capability and MSR as PMU_PT flag
Requirement: in CPU partition VM (RTVM), vtune or perf can be used to
sample hotspot code path to tune the RT performance, It need support
PMU/PEBS (Processor Event Based Sampling). Intel TCC asks for it, too.

It exposes PEBS related capabilities/features and MSRs to CPU
partition VM, like RTVM. PEBS is a part of PMU. Also PEBS needs
DS (Debug Store) feature to support. So DS is exposed too.

Limitation: current it just support PEBS feature in VM level, when CPU
traps to HV, the performance counter will stop. Perf global control
MSR is used to do this work. So, the counters shall be close to native.

Tracked-On: #6966
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2022-03-10 14:34:33 +08:00
..
arch/x86/asm hv: expose PEBS capability and MSR as PMU_PT flag 2022-03-10 14:34:33 +08:00
common hv: revert NMI notification by INIT signal 2022-03-10 14:34:33 +08:00
debug hv: remove CONFIG_LOG_DESTINATION 2021-12-06 14:24:40 +08:00
dm HV: move the ve820 GPU OpRegion address 2021-11-08 13:13:14 +08:00
hw HV: treewide: fix violations of coding guideline C-TY-02 2021-11-04 18:15:47 +08:00
lib hv: change error code of undefined hypercall 2022-02-21 09:25:50 +08:00
public hv: add a flag for PMU passthrough to guest VM 2022-03-10 14:34:33 +08:00