314 lines
9.0 KiB
C
314 lines
9.0 KiB
C
/*-
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include "dm.h"
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#include "vmmapi.h"
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#include "sw_load.h"
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#include "acpi.h"
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#include "log.h"
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/* If the vsbl is loaded by DM, the UOS memory layout will be like:
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*
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* | ... |
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* +--------------------------------------------------+
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* | offset: 0xf2400 (ACPI table) |
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* +--------------------------------------------------+
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* | ... |
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* +--------------------------------------------------+
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* | offset: 16MB (vsbl image) |
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* +--------------------------------------------------+
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* | ... |
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* +--------------------------------------------------+
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* | offset: lowmem - 16K (partition blob) |
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* +--------------------------------------------------+
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* | offset: lowmem - 12K (e820 table) |
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* +--------------------------------------------------+
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* | offset: lowmem - 8K (boot_args_address) |
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* +--------------------------------------------------+
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* | offset: lowmem - 6K (vsbl entry address) |
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* +--------------------------------------------------+
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* | offset: lowmem - 4K (config_page with e820 table)|
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* +--------------------------------------------------+
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*/
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/* vsbl binary layout:
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*
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* +--------------------------------------------------+ <--vSBL Top
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* | |offset: Top - 0x10 (reset vector) |
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* + STAGEINIT |------------------------------------+
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* | (0x10000) |other |
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* +--------------------------------------------------+
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* | |
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* + PAYLOAD +
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* |(0x100000) |
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* +--------------------------------------------------+
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* | |
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* + vFastboot +
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* |(0x200000) |
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* +--------------------------------------------------+
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*/
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/* Check default e820 table in sw_load_common.c for info about ctx->lowmem */
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#define CONFIGPAGE_OFF(ctx) ((ctx)->lowmem - 4*KB)
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#define VSBL_ENTRY_OFF(ctx) ((ctx)->lowmem - 6*KB)
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#define BOOTARGS_OFF(ctx) ((ctx)->lowmem - 8*KB)
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#define E820_TABLE_OFF(ctx) ((ctx)->lowmem - 12*KB)
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#define GUEST_PART_INFO_OFF(ctx) ((ctx)->lowmem - 16*KB)
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/* vsbl real entry is reset vector, which is (VSBL_TOP - 16) */
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#define VSBL_TOP(ctx) (64*MB)
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struct vsbl_para {
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uint64_t e820_table_address;
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uint64_t e820_entries;
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uint64_t acpi_table_address;
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uint64_t acpi_table_size;
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uint64_t guest_part_info_address;
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uint64_t guest_part_info_size;
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uint64_t vsbl_address;
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uint64_t vsbl_size;
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uint64_t bootargs_address;
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uint32_t trusty_enabled;
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uint32_t key_info_lock;
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uint32_t reserved;
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uint32_t boot_device_address;
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};
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static char guest_part_info_path[STR_LEN];
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static size_t guest_part_info_size;
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static bool with_guest_part_info;
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static char vsbl_path[STR_LEN];
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static size_t vsbl_size;
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static int boot_blk_bdf;
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extern int init_cmos_vrpmb(struct vmctx *ctx);
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#define LOW_8BIT(x) ((x) & 0xFF)
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void
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vsbl_set_bdf(int bnum, int snum, int fnum)
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{
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boot_blk_bdf = (LOW_8BIT(bnum) << 16) | (LOW_8BIT(snum) << 8) |
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LOW_8BIT(fnum);
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}
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int
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acrn_parse_guest_part_info(char *arg)
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{
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int error = -1;
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size_t len = strnlen(arg, STR_LEN);
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if (len < STR_LEN) {
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strncpy(guest_part_info_path, arg, len + 1);
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if (check_image(guest_part_info_path, 0, &guest_part_info_size) == 0) {
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with_guest_part_info = true;
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pr_info("SW_LOAD: get partition blob path %s\n",
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guest_part_info_path);
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error = 0;
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}
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}
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return error;
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}
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static int
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acrn_prepare_guest_part_info(struct vmctx *ctx)
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{
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FILE *fp;
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long len;
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size_t read;
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fp = fopen(guest_part_info_path, "r");
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if (fp == NULL) {
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pr_err("SW_LOAD ERR: could not open partition blob %s\n",
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guest_part_info_path);
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return -1;
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}
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fseek(fp, 0, SEEK_END);
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len = ftell(fp);
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if (len != guest_part_info_size) {
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pr_err("SW_LOAD ERR: partition blob changed\n");
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fclose(fp);
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return -1;
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}
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if ((len + GUEST_PART_INFO_OFF(ctx)) > BOOTARGS_OFF(ctx)) {
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pr_err("SW_LOAD ERR: too large partition blob\n");
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fclose(fp);
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return -1;
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}
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fseek(fp, 0, SEEK_SET);
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read = fread(ctx->baseaddr + GUEST_PART_INFO_OFF(ctx),
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sizeof(char), len, fp);
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if (read < len) {
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pr_err("SW_LOAD ERR: could not read whole partition blob\n");
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fclose(fp);
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return -1;
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}
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fclose(fp);
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pr_info("SW_LOAD: partition blob %s size %lu copy to guest 0x%lx\n",
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guest_part_info_path, guest_part_info_size,
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GUEST_PART_INFO_OFF(ctx));
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return 0;
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}
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int
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acrn_parse_vsbl(char *arg)
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{
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int error = -1;
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size_t len = strnlen(arg, STR_LEN);
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if (len < STR_LEN) {
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strncpy(vsbl_path, arg, len + 1);
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if (check_image(vsbl_path, 8 * MB, &vsbl_size) == 0) {
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vsbl_file_name = vsbl_path;
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pr_notice("SW_LOAD: get vsbl path %s\n", vsbl_path);
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error = 0;
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}
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}
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return error;
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}
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static int
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acrn_prepare_vsbl(struct vmctx *ctx)
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{
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FILE *fp;
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size_t read;
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fp = fopen(vsbl_path, "r");
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if (fp == NULL) {
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pr_err("SW_LOAD ERR: could not open vsbl file: %s\n",
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vsbl_path);
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return -1;
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}
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fseek(fp, 0, SEEK_END);
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if (ftell(fp) != vsbl_size) {
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pr_err("SW_LOAD ERR: vsbl file changed\n");
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fclose(fp);
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return -1;
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}
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fseek(fp, 0, SEEK_SET);
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read = fread(ctx->baseaddr + VSBL_TOP(ctx) - vsbl_size,
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sizeof(char), vsbl_size, fp);
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if (read < vsbl_size) {
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pr_err("SW_LOAD ERR: could not read whole partition blob\n");
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fclose(fp);
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return -1;
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}
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fclose(fp);
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pr_info("SW_LOAD: partition blob %s size %lu copy to guest 0x%lx\n",
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vsbl_path, vsbl_size, VSBL_TOP(ctx) - vsbl_size);
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return 0;
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}
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int
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acrn_sw_load_vsbl(struct vmctx *ctx)
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{
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int ret;
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struct e820_entry *e820;
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struct vsbl_para *vsbl_para;
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init_cmos_vrpmb(ctx);
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vsbl_para = (struct vsbl_para *)
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(ctx->baseaddr + CONFIGPAGE_OFF(ctx));
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memset(vsbl_para, 0x0, sizeof(struct vsbl_para));
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e820 = (struct e820_entry *)
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(ctx->baseaddr + E820_TABLE_OFF(ctx));
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vsbl_para->e820_entries = acrn_create_e820_table(ctx, e820);
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vsbl_para->e820_table_address = E820_TABLE_OFF(ctx);
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vsbl_para->acpi_table_address = get_acpi_base();
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vsbl_para->acpi_table_size = get_acpi_table_length();
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if (with_bootargs) {
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strncpy(ctx->baseaddr + BOOTARGS_OFF(ctx), get_bootargs(), STR_LEN);
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vsbl_para->bootargs_address = BOOTARGS_OFF(ctx);
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} else {
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vsbl_para->bootargs_address = 0;
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}
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if (with_guest_part_info) {
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ret = acrn_prepare_guest_part_info(ctx);
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if (ret)
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return ret;
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vsbl_para->guest_part_info_address = GUEST_PART_INFO_OFF(ctx);
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vsbl_para->guest_part_info_size = guest_part_info_size;
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} else {
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vsbl_para->guest_part_info_address = 0;
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vsbl_para->guest_part_info_size = 0;
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}
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ret = acrn_prepare_vsbl(ctx);
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if (ret)
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return ret;
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vsbl_para->vsbl_address = VSBL_TOP(ctx) - vsbl_size;
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vsbl_para->vsbl_size = vsbl_size;
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vsbl_para->e820_entries = add_e820_entry(e820, vsbl_para->e820_entries,
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vsbl_para->vsbl_address, vsbl_size, E820_TYPE_RESERVED);
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pr_info("SW_LOAD: vsbl_entry 0x%lx\n", VSBL_TOP(ctx) - 16);
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vsbl_para->boot_device_address = boot_blk_bdf;
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vsbl_para->trusty_enabled = trusty_enabled;
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/* set guest bsp state. Will call hypercall set bsp state
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* after bsp is created.
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*/
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memset(&ctx->bsp_regs, 0, sizeof( struct acrn_set_vcpu_regs));
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ctx->bsp_regs.vcpu_id = 0;
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/* CR0_ET | CR0_NE */
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ctx->bsp_regs.vcpu_regs.cr0 = 0x30U;
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ctx->bsp_regs.vcpu_regs.cs_ar = 0x009FU;
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ctx->bsp_regs.vcpu_regs.cs_sel = 0xF000U;
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ctx->bsp_regs.vcpu_regs.cs_limit = 0xFFFFU;
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ctx->bsp_regs.vcpu_regs.cs_base = (VSBL_TOP(ctx) - 16) &0xFFFF0000UL;
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ctx->bsp_regs.vcpu_regs.rip = (VSBL_TOP(ctx) - 16) & 0xFFFFUL;
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ctx->bsp_regs.vcpu_regs.gprs.rsi = CONFIGPAGE_OFF(ctx);
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return 0;
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}
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